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[172.254.253.57]) by smtp.gmail.com with ESMTPSA id z5sm1669377qtw.71.2021.11.03.07.08.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Nov 2021 07:08:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/23] linux-user/microblaze: Use force_sig_fault Date: Wed, 3 Nov 2021 10:08:35 -0400 Message-Id: <20211103140847.454070-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211103140847.454070-1-richard.henderson@linaro.org> References: <20211103140847.454070-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::82a; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the new function instead of setting up a target_siginfo_t and calling queue_signal. Fill in the missing PC for SIGTRAP. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/microblaze/cpu_loop.c | 61 +++++++++++++------------------- 1 file changed, 25 insertions(+), 36 deletions(-) diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index a94467dd2d..263b68aea1 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -27,9 +27,8 @@ void cpu_loop(CPUMBState *env) { CPUState *cs = env_cpu(env); - int trapnr, ret; - target_siginfo_t info; - + int trapnr, ret, si_code; + while (1) { cpu_exec_start(cs); trapnr = cpu_exec(cs); @@ -38,8 +37,8 @@ void cpu_loop(CPUMBState *env) switch (trapnr) { case EXCP_INTERRUPT: - /* just indicate that signals should be handled asap */ - break; + /* just indicate that signals should be handled asap */ + break; case EXCP_SYSCALL: /* Return address is 4 bytes after the call. */ env->regs[14] += 4; @@ -67,6 +66,7 @@ void cpu_loop(CPUMBState *env) */ env->regs[14] = env->pc; break; + case EXCP_HW_EXCP: env->regs[17] = env->pc + 4; if (env->iflags & D_FLAG) { @@ -74,42 +74,31 @@ void cpu_loop(CPUMBState *env) env->pc -= 4; /* FIXME: if branch was immed, replay the imm as well. */ } - env->iflags &= ~(IMM_FLAG | D_FLAG); - switch (env->esr & 31) { - case ESR_EC_DIVZERO: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = TARGET_FPE_FLTDIV; - info._sifields._sigfault._addr = 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - case ESR_EC_FPU: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - if (env->fsr & FSR_IO) { - info.si_code = TARGET_FPE_FLTINV; - } - if (env->fsr & FSR_DZ) { - info.si_code = TARGET_FPE_FLTDIV; - } - info._sifields._sigfault._addr = 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - default: - fprintf(stderr, "Unhandled hw-exception: 0x%x\n", - env->esr & ESR_EC_MASK); - cpu_dump_state(cs, stderr, 0); - exit(EXIT_FAILURE); - break; + case ESR_EC_DIVZERO: + si_code = TARGET_FPE_FLTDIV; + break; + case ESR_EC_FPU: + si_code = 0; + if (env->fsr & FSR_IO) { + si_code = TARGET_FPE_FLTINV; + } + if (env->fsr & FSR_DZ) { + si_code = TARGET_FPE_FLTDIV; + } + break; + default: + fprintf(stderr, "Unhandled hw-exception: 0x%x\n", + env->esr & ESR_EC_MASK); + cpu_dump_state(cs, stderr, 0); + exit(EXIT_FAILURE); } + force_sig_fault(TARGET_SIGFPE, si_code, env->pc); break; + case EXCP_DEBUG: - info.si_signo = TARGET_SIGTRAP; - info.si_errno = 0; - info.si_code = TARGET_TRAP_BRKPT; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc); break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); -- 2.25.1