From: Warner Losh <imp@bsdimp.com>
To: qemu-devel@nongnu.org
Cc: "Stacey Son" <sson@FreeBSD.org>,
qemu-trivial@nongnu.org, "Kyle Evans" <kevans@FreeBSD.org>,
"Michael Tokarev" <mjt@tls.msk.ru>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daude" <f4bug@amsat.org>,
"Mikaël Urankar" <mikael.urankar@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Warner Losh" <imp@bsdimp.com>
Subject: [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
Date: Thu, 4 Nov 2021 08:05:14 -0600 [thread overview]
Message-ID: <20211104140536.42573-8-imp@bsdimp.com> (raw)
In-Reply-To: <20211104140536.42573-1-imp@bsdimp.com>
Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
bsd-user/arm/target_arch_cpu.h | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 2484bdc2f7..9f9b380b13 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -48,6 +48,39 @@ static inline void target_cpu_loop(CPUARMState *env)
cpu_exec_end(cs);
process_queued_cpu_work(cs);
switch (trapnr) {
+ case EXCP_UDEF:
+ {
+ /* See arm/arm/undefined.c undefinedinstruction(); */
+ info.si_addr = env->regs[15];
+
+ /* illegal instruction */
+ info.si_signo = TARGET_SIGILL;
+ info.si_errno = 0;
+ info.si_code = TARGET_ILL_ILLOPC;
+ queue_signal(env, info.si_signo, &info);
+
+ /* TODO: What about instruction emulation? */
+ }
+ break;
+ case EXCP_INTERRUPT:
+ /* just indicate that signals should be handled asap */
+ break;
+ case EXCP_DEBUG:
+ {
+
+ info.si_signo = TARGET_SIGTRAP;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ info.si_addr = env->exception.vaddress;
+ queue_signal(env, info.si_signo, &info);
+ }
+ break;
+ case EXCP_ATOMIC:
+ cpu_exec_step_atomic(cs);
+ break;
+ case EXCP_YIELD:
+ /* nothing to do here for user-mode, just resume guest code */
+ break;
default:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
trapnr);
--
2.33.0
next prev parent reply other threads:[~2021-11-04 14:11 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-04 14:05 [PATCH v3 00/29] bsd-user: arm (32-bit) support Warner Losh
2021-11-04 14:05 ` [PATCH v3 01/29] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
2021-11-04 14:05 ` [PATCH v3 02/29] bsd-user/arm/target_syscall.h: Add copyright and update name Warner Losh
2021-11-04 14:05 ` [PATCH v3 03/29] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines Warner Losh
2021-11-04 14:05 ` [PATCH v3 04/29] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions Warner Losh
2021-11-04 14:05 ` [PATCH v3 05/29] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs Warner Losh
2021-11-04 14:05 ` [PATCH v3 06/29] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation Warner Losh
2021-11-04 14:05 ` Warner Losh [this message]
2021-11-04 17:44 ` [PATCH v3 07/29] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Richard Henderson
2021-11-04 14:05 ` [PATCH v3 08/29] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions Warner Losh
2021-11-04 14:05 ` [PATCH v3 09/29] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch Warner Losh
2021-11-04 14:05 ` [PATCH v3 10/29] bsd-user/arm/target_arch_reg.h: Implement core dump register copying Warner Losh
2021-11-04 14:05 ` [PATCH v3 11/29] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space Warner Losh
2021-11-04 14:05 ` [PATCH v3 12/29] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm Warner Losh
2021-11-04 14:05 ` [PATCH v3 13/29] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread Warner Losh
2021-11-04 14:05 ` [PATCH v3 14/29] bsd-user/arm/target_arch_elf.h: arm defines for ELF Warner Losh
2021-11-04 14:05 ` [PATCH v3 15/29] bsd-user/arm/target_arch_elf.h: arm get hwcap Warner Losh
2021-11-04 14:05 ` [PATCH v3 16/29] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl Warner Losh
2021-11-04 14:05 ` [PATCH v3 17/29] bsd-user/freebsd: Create common target_os_ucontext.h file Warner Losh
2021-11-04 14:05 ` [PATCH v3 18/29] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack Warner Losh
2021-11-04 14:05 ` [PATCH v3 19/29] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
2021-11-04 17:48 ` Richard Henderson
2021-11-04 17:58 ` Warner Losh
2021-11-04 18:26 ` Warner Losh
2021-11-04 20:56 ` Warner Losh
2021-11-04 14:05 ` [PATCH v3 20/29] bsd-user/arm/target_arch_signal.h: arm user context and trapframe " Warner Losh
2021-11-04 14:05 ` [PATCH v3 21/29] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args Warner Losh
2021-11-04 14:05 ` [PATCH v3 22/29] bsd-user/arm/target_arch_signal.h: arm get_mcontext Warner Losh
2021-11-04 14:05 ` [PATCH v3 23/29] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
2021-11-04 18:41 ` Richard Henderson
2021-11-04 23:59 ` Warner Losh
2021-11-04 14:05 ` [PATCH v3 24/29] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn Warner Losh
2021-11-04 14:05 ` [PATCH v3 25/29] bsd-user: add arm target build Warner Losh
2021-11-04 14:05 ` [PATCH v3 26/29] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext Warner Losh
2021-11-04 14:05 ` [PATCH v3 27/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
2021-11-04 14:05 ` [PATCH v3 28/29] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h Warner Losh
2021-11-04 14:05 ` [PATCH v3 29/29] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
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