From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: Daniel Henrique Barboza <danielhb413@gmail.com>,
richard.henderson@linaro.org, groug@kaod.org,
qemu-ppc@nongnu.org, clg@kaod.org, matheus.ferst@eldorado.org.br,
david@gibson.dropbear.id.au
Subject: [PATCH v6 00/10] PMU-EBB support for PPC64 TCG
Date: Mon, 8 Nov 2021 19:50:37 -0300 [thread overview]
Message-ID: <20211108225047.1733607-1-danielhb413@gmail.com> (raw)
Hi,
This version contains changes proposed by Matheus in the
v5 review.
Changes from v5:
- patch 2:
* added an extra argument to pmu_update_cycles() and pmc_is_active()
to consider the case where we want to consider the frozen counter bits
of a previous MMCR0 state
* added additional logic to allow for FC14/FC56 bits to freeze their
individual counters without stopping the PMU
- patch 3:
* changed macro name to PMC_COUNTER_NEGATIVE_VAL and made it unsigned
* fixed typo in comment
* removed the extra space after '='
- patch 9:
* check for FSCR[EBB] before firing the EBB exception
v5 link: https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg00385.html
Daniel Henrique Barboza (9):
target/ppc: introduce PMUEventType and PMU overflow timers
target/ppc: PMU basic cycle count for pseries TCG
target/ppc: enable PMU counter overflow with cycle events
target/ppc: enable PMU instruction count
target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event
target/ppc: PMU: handle setting of PMCs while running
target/ppc/power8-pmu.c: handle overflow bits when PMU is running
PPC64/TCG: Implement 'rfebb' instruction
target/ppc/excp_helper.c: EBB handling adjustments
Gustavo Romero (1):
target/ppc: PMU Event-Based exception support
hw/ppc/spapr_cpu_core.c | 6 +
target/ppc/cpu.h | 60 +++-
target/ppc/cpu_init.c | 20 +-
target/ppc/excp_helper.c | 93 ++++++
target/ppc/helper.h | 4 +
target/ppc/helper_regs.c | 4 +
target/ppc/insn32.decode | 5 +
target/ppc/meson.build | 1 +
target/ppc/power8-pmu-regs.c.inc | 45 ++-
target/ppc/power8-pmu.c | 403 +++++++++++++++++++++++++
target/ppc/power8-pmu.h | 25 ++
target/ppc/spr_tcg.h | 3 +
target/ppc/translate.c | 60 ++++
target/ppc/translate/branch-impl.c.inc | 33 ++
14 files changed, 749 insertions(+), 13 deletions(-)
create mode 100644 target/ppc/power8-pmu.c
create mode 100644 target/ppc/power8-pmu.h
create mode 100644 target/ppc/translate/branch-impl.c.inc
--
2.31.1
next reply other threads:[~2021-11-08 22:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-08 22:50 Daniel Henrique Barboza [this message]
2021-11-08 22:50 ` [PATCH v6 01/10] target/ppc: introduce PMUEventType and PMU overflow timers Daniel Henrique Barboza
2021-11-12 3:02 ` David Gibson
2021-11-13 19:02 ` Daniel Henrique Barboza
2021-11-18 5:47 ` David Gibson
2021-11-08 22:50 ` [PATCH v6 02/10] target/ppc: PMU basic cycle count for pseries TCG Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 03/10] target/ppc: enable PMU counter overflow with cycle events Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 04/10] target/ppc: enable PMU instruction count Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 05/10] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 06/10] target/ppc: PMU: handle setting of PMCs while running Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 07/10] target/ppc/power8-pmu.c: handle overflow bits when PMU is running Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 08/10] PPC64/TCG: Implement 'rfebb' instruction Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 09/10] target/ppc: PMU Event-Based exception support Daniel Henrique Barboza
2021-11-08 22:50 ` [PATCH v6 10/10] target/ppc/excp_helper.c: EBB handling adjustments Daniel Henrique Barboza
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