[PATCH 1/5] hw/pci/pcie_port: Rename 'native-hotplug' to 'native-hpc-bit'

[Julia Suvorova <jusual@redhat.com>]

Rename the option to better represent its function - toggle Hot-Plug
Capable bit in the PCIe Slot Capability.

Signed-off-by: Julia Suvorova <jusual@redhat.com>
---
 include/hw/pci/pcie_port.h         | 2 +-
 hw/i386/pc_q35.c                   | 2 +-
 hw/pci-bridge/gen_pcie_root_port.c | 6 +++++-
 hw/pci/pcie.c                      | 2 +-
 hw/pci/pcie_port.c                 | 2 +-
 5 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index e25b289ce8..0da6d66c95 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -60,7 +60,7 @@ struct PCIESlot {
     /* Indicates whether any type of hot-plug is allowed on the slot */
     bool        hotplug;
 
-    bool        native_hotplug;
+    bool        native_hpc_bit;
 
     QLIST_ENTRY(PCIESlot) next;
 };
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 797e09500b..ded61f8ef7 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -243,7 +243,7 @@ static void pc_q35_init(MachineState *machine)
                                           NULL);
 
     if (acpi_pcihp) {
-        object_register_sugar_prop(TYPE_PCIE_SLOT, "native-hotplug",
+        object_register_sugar_prop(TYPE_PCIE_SLOT, "native-hpc-bit",
                                    "false", true);
     }
 
diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
index 20099a8ae3..ed079d72b3 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -87,7 +87,11 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
         return;
     }
 
-    if (grp->res_reserve.io == -1 && s->hotplug && !s->native_hotplug) {
+    /*
+     * Make sure that IO is assigned in case the slot is hot-pluggable
+     * but it is not visible through the PCIe Slot Capabilities
+     */
+    if (grp->res_reserve.io == -1 && s->hotplug && !s->native_hpc_bit) {
         grp->res_reserve.io = GEN_PCIE_ROOT_DEFAULT_IO_RANGE;
     }
     int rc = pci_bridge_qemu_reserve_cap_init(d, 0,
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 914a9bf3d1..ebe002831e 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -535,7 +535,7 @@ void pcie_cap_slot_init(PCIDevice *dev, PCIESlot *s)
      * hot-plug is disabled on the slot.
      */
     if (s->hotplug &&
-        (s->native_hotplug || DEVICE(dev)->hotplugged)) {
+        (s->native_hpc_bit || DEVICE(dev)->hotplugged)) {
         pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP,
                                    PCI_EXP_SLTCAP_HPS |
                                    PCI_EXP_SLTCAP_HPC);
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index da850e8dde..eae06d10e2 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -148,7 +148,7 @@ static Property pcie_slot_props[] = {
     DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
     DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
     DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),
-    DEFINE_PROP_BOOL("native-hotplug", PCIESlot, native_hotplug, true),
+    DEFINE_PROP_BOOL("native-hpc-bit", PCIESlot, native_hpc_bit, true),
     DEFINE_PROP_END_OF_LIST()
 };
 
-- 
2.31.1