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Fri, 19 Nov 2021 14:43:10 -0800 (PST) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id g26sm239115ots.25.2021.11.19.14.43.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Nov 2021 14:43:10 -0800 (PST) Date: Fri, 19 Nov 2021 15:42:30 -0700 From: Alex Williamson To: John Johnson Subject: Re: [RFC v3 13/19] vfio-user: pci_user_realize PCI setup Message-ID: <20211119154230.0a06ea21.alex.williamson@redhat.com> In-Reply-To: References: X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=alex.williamson@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=alex.williamson@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 8 Nov 2021 16:46:41 -0800 John Johnson wrote: > PCI BARs read from remote device > PCI config reads/writes sent to remote server > > Signed-off-by: Elena Ufimtseva > Signed-off-by: John G Johnson > Signed-off-by: Jagannathan Raman > --- > hw/vfio/pci.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 88 insertions(+), 1 deletion(-) > > diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c > index d5f9987..f8729b2 100644 > --- a/hw/vfio/pci.c > +++ b/hw/vfio/pci.c > @@ -3551,8 +3551,93 @@ static void vfio_user_pci_realize(PCIDevice *pdev, Error **errp) > goto error; > } > There's a LOT of duplication with the kernel realize function here. Thanks, Alex > + /* Get a copy of config space */ > + ret = VDEV_REGION_READ(vbasedev, VFIO_PCI_CONFIG_REGION_INDEX, 0, > + MIN(pci_config_size(pdev), vdev->config_size), > + pdev->config); > + if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) { > + error_setg_errno(errp, -ret, "failed to read device config space"); > + goto error; > + } > + > + /* vfio emulates a lot for us, but some bits need extra love */ > + vdev->emulated_config_bits = g_malloc0(vdev->config_size); > + > + /* QEMU can choose to expose the ROM or not */ > + memset(vdev->emulated_config_bits + PCI_ROM_ADDRESS, 0xff, 4); > + /* QEMU can also add or extend BARs */ > + memset(vdev->emulated_config_bits + PCI_BASE_ADDRESS_0, 0xff, 6 * 4); > + vdev->vendor_id = pci_get_word(pdev->config + PCI_VENDOR_ID); > + vdev->device_id = pci_get_word(pdev->config + PCI_DEVICE_ID); > + > + /* QEMU can change multi-function devices to single function, or reverse */ > + vdev->emulated_config_bits[PCI_HEADER_TYPE] = > + PCI_HEADER_TYPE_MULTI_FUNCTION; > + > + /* Restore or clear multifunction, this is always controlled by QEMU */ > + if (vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { > + vdev->pdev.config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; > + } else { > + vdev->pdev.config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; > + } > + > + /* > + * Clear host resource mapping info. If we choose not to register a > + * BAR, such as might be the case with the option ROM, we can get > + * confusing, unwritable, residual addresses from the host here. > + */ > + memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24); > + memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4); > + > + vfio_pci_size_rom(vdev); > + > + vfio_bars_prepare(vdev); > + > + vfio_msix_early_setup(vdev, &err); > + if (err) { > + error_propagate(errp, err); > + goto error; > + } > + > + vfio_bars_register(vdev); > + > + ret = vfio_add_capabilities(vdev, errp); > + if (ret) { > + goto out_teardown; > + } > + > + /* QEMU emulates all of MSI & MSIX */ > + if (pdev->cap_present & QEMU_PCI_CAP_MSIX) { > + memset(vdev->emulated_config_bits + pdev->msix_cap, 0xff, > + MSIX_CAP_LENGTH); > + } > + > + if (pdev->cap_present & QEMU_PCI_CAP_MSI) { > + memset(vdev->emulated_config_bits + pdev->msi_cap, 0xff, > + vdev->msi_cap_size); > + } > + > + if (vdev->pdev.config[PCI_INTERRUPT_PIN] != 0) { > + vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, > + vfio_intx_mmap_enable, vdev); > + pci_device_set_intx_routing_notifier(&vdev->pdev, > + vfio_intx_routing_notifier); > + vdev->irqchip_change_notifier.notify = vfio_irqchip_change; > + kvm_irqchip_add_change_notifier(&vdev->irqchip_change_notifier); > + ret = vfio_intx_enable(vdev, errp); > + if (ret) { > + goto out_deregister; > + } > + } > + > return; > > +out_deregister: > + pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); > + kvm_irqchip_remove_change_notifier(&vdev->irqchip_change_notifier); > +out_teardown: > + vfio_teardown_msi(vdev); > + vfio_bars_exit(vdev); > error: > vfio_user_disconnect(proxy); > error_prepend(errp, VFIO_MSG_PREFIX, vdev->vbasedev.name); > @@ -3565,7 +3650,9 @@ static void vfio_user_instance_finalize(Object *obj) > > vfio_put_device(vdev); > > - vfio_user_disconnect(vbasedev->proxy); > + if (vbasedev->proxy != NULL) { > + vfio_user_disconnect(vbasedev->proxy); > + } > } > > static Property vfio_user_pci_dev_properties[] = {