From: David Woodhouse <dwmw2@infradead.org>
To: qemu-devel@nongnu.org
Cc: Eduardo Habkost <eduardo@habkost.net>,
kvm@vger.kernel.org, "Michael S. Tsirkin" <mst@redhat.com>,
Jason Wang <jasowang@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Peter Xu <peterx@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
Subject: [PATCH v2 1/4] target/i386: Fix sanity check on max APIC ID / X2APIC enablement
Date: Thu, 9 Dec 2021 22:08:37 +0000 [thread overview]
Message-ID: <20211209220840.14889-1-dwmw2@infradead.org> (raw)
The check on x86ms->apic_id_limit in pc_machine_done() had two problems.
Firstly, we need KVM to support the X2APIC API in order to allow IRQ
delivery to APICs >= 255. So we need to call/check kvm_enable_x2apic(),
which was done elsewhere in *some* cases but not all.
Secondly, microvm needs the same check. So move it from pc_machine_done()
to x86_cpus_init() where it will work for both.
The check in kvm_cpu_instance_init() is now redundant and can be dropped.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Acked-by: Claudio Fontana <cfontana@suse.de>
---
hw/i386/pc.c | 8 --------
hw/i386/x86.c | 16 ++++++++++++++++
target/i386/kvm/kvm-cpu.c | 2 +-
3 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a2ef40ecbc..9959f93216 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -736,14 +736,6 @@ void pc_machine_done(Notifier *notifier, void *data)
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
}
-
-
- if (x86ms->apic_id_limit > 255 && !xen_enabled() &&
- !kvm_irqchip_in_kernel()) {
- error_report("current -smp configuration requires kernel "
- "irqchip support.");
- exit(EXIT_FAILURE);
- }
}
void pc_guest_info_init(PCMachineState *pcms)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index b84840a1bb..f64639b873 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -39,6 +39,7 @@
#include "sysemu/replay.h"
#include "sysemu/sysemu.h"
#include "sysemu/cpu-timers.h"
+#include "sysemu/xen.h"
#include "trace.h"
#include "hw/i386/x86.h"
@@ -136,6 +137,21 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version)
*/
x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms,
ms->smp.max_cpus - 1) + 1;
+
+ /*
+ * Can we support APIC ID 255 or higher?
+ *
+ * Under Xen: yes.
+ * With userspace emulated lapic: no
+ * With KVM's in-kernel lapic: only if X2APIC API is enabled.
+ */
+ if (x86ms->apic_id_limit > 255 && !xen_enabled() &&
+ (!kvm_irqchip_in_kernel() || !kvm_enable_x2apic())) {
+ error_report("current -smp configuration requires kernel "
+ "irqchip and X2APIC API support.");
+ exit(EXIT_FAILURE);
+ }
+
possible_cpus = mc->possible_cpu_arch_ids(ms);
for (i = 0; i < ms->smp.cpus; i++) {
x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal);
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index d95028018e..c60cb2dafb 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -165,7 +165,7 @@ static void kvm_cpu_instance_init(CPUState *cs)
/* only applies to builtin_x86_defs cpus */
if (!kvm_irqchip_in_kernel()) {
x86_cpu_change_kvm_default("x2apic", "off");
- } else if (kvm_irqchip_is_split() && kvm_enable_x2apic()) {
+ } else if (kvm_irqchip_is_split()) {
x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on");
}
--
2.31.1
next reply other threads:[~2021-12-09 22:25 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-09 22:08 David Woodhouse [this message]
2021-12-09 22:08 ` [PATCH v2 2/4] intel_iommu: Support IR-only mode without DMA translation David Woodhouse
2021-12-16 8:47 ` Peter Xu
2021-12-09 22:08 ` [PATCH v2 3/4] intel_iommu: Only allow interrupt remapping to be enabled if it's supported David Woodhouse
2021-12-09 22:08 ` [PATCH v2 4/4] intel_iommu: Fix irqchip / X2APIC configuration checks David Woodhouse
2021-12-16 8:47 ` Peter Xu
2021-12-17 16:51 ` David Woodhouse
2021-12-20 10:07 ` Peter Xu
2021-12-16 6:29 ` [PATCH v2 1/4] target/i386: Fix sanity check on max APIC ID / X2APIC enablement Peter Xu
2022-01-06 10:38 ` Michael S. Tsirkin
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