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From: David Woodhouse <dwmw2@infradead.org>
To: qemu-devel@nongnu.org
Cc: Eduardo Habkost <eduardo@habkost.net>,
	kvm@vger.kernel.org, "Michael S. Tsirkin" <mst@redhat.com>,
	Jason Wang <jasowang@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Peter Xu <peterx@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
Subject: [PATCH v2 4/4] intel_iommu: Fix irqchip / X2APIC configuration checks
Date: Thu,  9 Dec 2021 22:08:40 +0000	[thread overview]
Message-ID: <20211209220840.14889-4-dwmw2@infradead.org> (raw)
In-Reply-To: <20211209220840.14889-1-dwmw2@infradead.org>

We don't need to check kvm_enable_x2apic(). It's perfectly OK to support
interrupt remapping even if we can't address CPUs above 254. Kind of
pointless, but still functional.

The check on kvm_enable_x2apic() needs to happen *anyway* in order to
allow CPUs above 254 even without an IOMMU, so allow that to happen
elsewhere.

However, we do require the *split* irqchip in order to rewrite I/OAPIC
destinations. So fix that check while we're here.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
---
 hw/i386/intel_iommu.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index bd288d45bb..0d1c72f08e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3760,15 +3760,10 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
                                               ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
     }
     if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) {
-        if (!kvm_irqchip_in_kernel()) {
+        if (!kvm_irqchip_is_split()) {
             error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split");
             return false;
         }
-        if (!kvm_enable_x2apic()) {
-            error_setg(errp, "eim=on requires support on the KVM side"
-                             "(X2APIC_API, first shipped in v4.7)");
-            return false;
-        }
     }
 
     /* Currently only address widths supported are 39 and 48 bits */
-- 
2.31.1



  parent reply	other threads:[~2021-12-09 22:25 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-09 22:08 [PATCH v2 1/4] target/i386: Fix sanity check on max APIC ID / X2APIC enablement David Woodhouse
2021-12-09 22:08 ` [PATCH v2 2/4] intel_iommu: Support IR-only mode without DMA translation David Woodhouse
2021-12-16  8:47   ` Peter Xu
2021-12-09 22:08 ` [PATCH v2 3/4] intel_iommu: Only allow interrupt remapping to be enabled if it's supported David Woodhouse
2021-12-09 22:08 ` David Woodhouse [this message]
2021-12-16  8:47   ` [PATCH v2 4/4] intel_iommu: Fix irqchip / X2APIC configuration checks Peter Xu
2021-12-17 16:51     ` David Woodhouse
2021-12-20 10:07       ` Peter Xu
2021-12-16  6:29 ` [PATCH v2 1/4] target/i386: Fix sanity check on max APIC ID / X2APIC enablement Peter Xu
2022-01-06 10:38 ` Michael S. Tsirkin

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