From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Fam Zheng" <fam@euphon.net>, "Hannes Reinecke" <hare@suse.com>,
qemu-block@nongnu.org, "David Hildenbrand" <david@redhat.com>,
"John Snow" <jsnow@redhat.com>,
"Jason Wang" <jasowang@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Li Qiang" <liq3ea@gmail.com>,
"Qiuhao Li" <Qiuhao.Li@outlook.com>,
"Peter Xu" <peterx@redhat.com>, "Keith Busch" <kbusch@kernel.org>,
"Alexander Bulekov" <alxndr@bu.edu>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Klaus Jensen" <its@irrelevant.dk>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH 5/8] dma: Let dma_buf_write() take MemTxAttrs argument
Date: Thu, 16 Dec 2021 13:35:55 +0100 [thread overview]
Message-ID: <20211216123558.799425-6-philmd@redhat.com> (raw)
In-Reply-To: <20211216123558.799425-1-philmd@redhat.com>
Let devices specify transaction attributes when calling
dma_buf_write().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 2 +-
hw/ide/ahci.c | 6 ++++--
hw/nvme/ctrl.c | 3 ++-
hw/scsi/megasas.c | 2 +-
hw/scsi/scsi-bus.c | 2 +-
softmmu/dma-helpers.c | 5 ++---
6 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 2721bf296a8..c5f45f6c594 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -304,7 +304,7 @@ BlockAIOCB *dma_blk_write(BlockBackend *blk,
QEMUSGList *sg, uint64_t offset, uint32_t align,
BlockCompletionFunc *cb, void *opaque);
uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg);
-uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg);
+uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs attrs);
void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
QEMUSGList *sg, enum BlockAcctType type);
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 8e77ddb660f..079d2977f23 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1381,8 +1381,10 @@ static void ahci_pio_transfer(const IDEDMA *dma)
has_sglist ? "" : "o");
if (has_sglist && size) {
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
+
if (is_write) {
- dma_buf_write(s->data_ptr, size, &s->sg);
+ dma_buf_write(s->data_ptr, size, &s->sg, attrs);
} else {
dma_buf_read(s->data_ptr, size, &s->sg);
}
@@ -1479,7 +1481,7 @@ static int ahci_dma_rw_buf(const IDEDMA *dma, bool is_write)
if (is_write) {
dma_buf_read(p, l, &s->sg);
} else {
- dma_buf_write(p, l, &s->sg);
+ dma_buf_write(p, l, &s->sg, MEMTXATTRS_UNSPECIFIED);
}
/* free sglist, update byte count */
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 5f573c417b3..e1a531d5d6c 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -1146,10 +1146,11 @@ static uint16_t nvme_tx(NvmeCtrl *n, NvmeSg *sg, uint8_t *ptr, uint32_t len,
assert(sg->flags & NVME_SG_ALLOC);
if (sg->flags & NVME_SG_DMA) {
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
uint64_t residual;
if (dir == NVME_TX_DIRECTION_TO_DEVICE) {
- residual = dma_buf_write(ptr, len, &sg->qsg);
+ residual = dma_buf_write(ptr, len, &sg->qsg, attrs);
} else {
residual = dma_buf_read(ptr, len, &sg->qsg);
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 733ca8e9865..4ec104b7820 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -1464,7 +1464,7 @@ static int megasas_dcmd_set_properties(MegasasState *s, MegasasCmd *cmd)
dcmd_size);
return MFI_STAT_INVALID_PARAMETER;
}
- dma_buf_write(&info, dcmd_size, &cmd->qsg);
+ dma_buf_write(&info, dcmd_size, &cmd->qsg, MEMTXATTRS_UNSPECIFIED);
trace_megasas_dcmd_unsupported(cmd->index, cmd->iov_size);
return MFI_STAT_OK;
}
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 77325d8cc7a..64a506a3975 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -1423,7 +1423,7 @@ void scsi_req_data(SCSIRequest *req, int len)
if (req->cmd.mode == SCSI_XFER_FROM_DEV) {
req->resid = dma_buf_read(buf, len, req->sg);
} else {
- req->resid = dma_buf_write(buf, len, req->sg);
+ req->resid = dma_buf_write(buf, len, req->sg, MEMTXATTRS_UNSPECIFIED);
}
scsi_req_continue(req);
}
diff --git a/softmmu/dma-helpers.c b/softmmu/dma-helpers.c
index fa81d2b386c..2f1a241b81a 100644
--- a/softmmu/dma-helpers.c
+++ b/softmmu/dma-helpers.c
@@ -322,10 +322,9 @@ uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg)
MEMTXATTRS_UNSPECIFIED);
}
-uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg)
+uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs attrs)
{
- return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE,
- MEMTXATTRS_UNSPECIFIED);
+ return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE, attrs);
}
void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
--
2.33.1
next prev parent reply other threads:[~2021-12-16 12:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 12:35 [PATCH 0/8] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 2) Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 1/8] dma: Have dma_buf_rw() take a void pointer Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 2/8] dma: Have dma_buf_read() / dma_buf_write() " Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 3/8] dma: Let pci_dma_rw() take MemTxAttrs argument Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 4/8] dma: Let dma_buf_rw() " Philippe Mathieu-Daudé
2021-12-16 12:35 ` Philippe Mathieu-Daudé [this message]
2021-12-16 12:35 ` [PATCH 6/8] dma: Let dma_buf_read() " Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 7/8] dma: Let dma_buf_rw() propagate MemTxResult Philippe Mathieu-Daudé
2021-12-16 12:35 ` [PATCH 8/8] dma: Let dma_buf_read() / dma_buf_write() " Philippe Mathieu-Daudé
2021-12-16 12:39 ` Philippe Mathieu-Daudé
2021-12-16 19:33 ` [PATCH 0/8] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 2) Klaus Jensen
2021-12-16 23:28 ` John Snow
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