From: WANG Xuerui <git@xen0n.name>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"XiaoJuan Yang" <yangxiaojuan@loongson.cn>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Laurent Vivier" <laurent@vivier.eu>,
"WANG Xuerui" <git@xen0n.name>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Song Gao" <gaosong@loongson.cn>
Subject: [PATCH v11 26/31] tcg/loongarch64: Implement tcg_target_init
Date: Tue, 21 Dec 2021 13:41:00 +0800 [thread overview]
Message-ID: <20211221054105.178795-27-git@xen0n.name> (raw)
In-Reply-To: <20211221054105.178795-1-git@xen0n.name>
Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 92a30b791a..19bfc135f6 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1604,3 +1604,30 @@ static void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_opc_addi_d(s, TCG_REG_SP, TCG_REG_SP, FRAME_SIZE);
tcg_out_opc_jirl(s, TCG_REG_ZERO, TCG_REG_RA, 0);
}
+
+static void tcg_target_init(TCGContext *s)
+{
+ tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
+ tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
+
+ tcg_target_call_clobber_regs = ALL_GENERAL_REGS;
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S0);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S1);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S2);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S3);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S4);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S5);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S6);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S7);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S8);
+ tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9);
+
+ s->reserved_regs = 0;
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_TP);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_RESERVED);
+}
--
2.34.0
next prev parent reply other threads:[~2021-12-21 6:14 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-21 5:40 [PATCH v11 00/31] LoongArch64 port of QEMU TCG WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 01/31] elf: Add machine type value for LoongArch WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 03/31] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 06/31] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 07/31] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 08/31] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 10/31] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 11/31] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 13/31] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 15/31] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 17/31] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 19/31] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 20/31] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 21/31] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 22/31] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 24/31] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 25/31] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-12-21 5:41 ` WANG Xuerui [this message]
2021-12-21 5:41 ` [PATCH v11 27/31] tcg/loongarch64: Register the JIT WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 28/31] common-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 29/31] linux-user: Implement CPU-specific signal handler " WANG Xuerui
2021-12-30 3:11 ` gaosong
2021-12-30 3:50 ` WANG Xuerui
2022-01-04 12:48 ` Philippe Mathieu-Daudé
2021-12-21 5:41 ` [PATCH v11 30/31] configure, meson.build: Mark support " WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 31/31] tests/docker: Add gentoo-loongarch64-cross image and run cross builds in GitLab WANG Xuerui
2021-12-21 8:44 ` [PATCH v11 00/31] LoongArch64 port of QEMU TCG Philippe Mathieu-Daudé
2021-12-21 9:36 ` gaosong
2021-12-21 12:00 ` Philippe Mathieu-Daudé
2021-12-23 2:00 ` gaosong
2021-12-21 16:49 ` Richard Henderson
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