From: Anup Patel <anup@brainfault.org>
To: Peter Maydell <peter.maydell@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: qemu-riscv@nongnu.org, Anup Patel <anup@brainfault.org>,
qemu-devel@nongnu.org,
Alistair Francis <alistair.francis@wdc.com>,
Atish Patra <atishp@atishpatra.org>,
Bin Meng <bmeng.cn@gmail.com>
Subject: [PATCH v6 16/23] hw/riscv: virt: Use AIA INTC compatible string when available
Date: Thu, 30 Dec 2021 18:05:32 +0530 [thread overview]
Message-ID: <20211230123539.52786-17-anup@brainfault.org> (raw)
In-Reply-To: <20211230123539.52786-1-anup@brainfault.org>
From: Anup Patel <anup.patel@wdc.com>
We should use the AIA INTC compatible string in the CPU INTC
DT nodes when the CPUs support AIA feature. This will allow
Linux INTC driver to use AIA local interrupt CSRs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 3af074148e..720641b1dd 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
qemu_fdt_add_subnode(mc->fdt, intc_name);
qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
intc_phandles[cpu]);
- qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
- "riscv,cpu-intc");
+ if (riscv_feature(&s->soc[socket].harts[cpu].env,
+ RISCV_FEATURE_AIA)) {
+ static const char * const compat[2] = {
+ "riscv,cpu-intc-aia", "riscv,cpu-intc"
+ };
+ qemu_fdt_setprop_string_array(mc->fdt, intc_name, "compatible",
+ (char **)&compat, ARRAY_SIZE(compat));
+ } else {
+ qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
+ "riscv,cpu-intc");
+ }
qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0);
qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
--
2.25.1
next prev parent reply other threads:[~2021-12-30 13:01 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-30 12:35 [PATCH v6 00/23] QEMU RISC-V AIA support Anup Patel
2021-12-30 12:35 ` [PATCH v6 01/23] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode Anup Patel
2022-01-12 12:29 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 02/23] target/riscv: Implement SGEIP bit in hip and hie CSRs Anup Patel
2022-01-13 14:35 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 03/23] target/riscv: Implement hgeie and hgeip CSRs Anup Patel
2022-01-14 6:37 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 04/23] target/riscv: Improve delivery of guest external interrupts Anup Patel
2022-01-13 7:51 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 05/23] target/riscv: Allow setting CPU feature from machine/device emulation Anup Patel
2022-01-12 12:34 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 06/23] target/riscv: Add AIA cpu feature Anup Patel
2022-01-12 12:34 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 07/23] target/riscv: Add defines for AIA CSRs Anup Patel
2022-01-12 12:57 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 08/23] target/riscv: Allow AIA device emulation to set ireg rmw callback Anup Patel
2022-01-12 12:59 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 09/23] target/riscv: Implement AIA local interrupt priorities Anup Patel
2022-01-10 13:08 ` Frank Chang
2022-01-11 17:18 ` Anup Patel
2022-01-12 3:00 ` Frank Chang
2022-01-13 10:45 ` Anup Patel
2022-01-13 14:21 ` Frank Chang
2022-01-10 13:25 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32 Anup Patel
2022-01-14 9:48 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 11/23] target/riscv: Implement AIA hvictl and hviprioX CSRs Anup Patel
2022-01-12 13:15 ` Frank Chang
2022-01-13 10:49 ` Anup Patel
2021-12-30 12:35 ` [PATCH v6 12/23] target/riscv: Implement AIA interrupt filtering CSRs Anup Patel
2022-01-11 6:00 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 13/23] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs Anup Patel
2022-01-12 12:15 ` Frank Chang
2022-01-13 10:48 ` Anup Patel
2021-12-30 12:35 ` [PATCH v6 14/23] target/riscv: Implement AIA xiselect and xireg CSRs Anup Patel
2022-01-12 16:40 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 15/23] target/riscv: Implement AIA IMSIC interface CSRs Anup Patel
2022-01-05 3:30 ` Frank Chang
2022-01-08 12:03 ` Anup Patel
2021-12-30 12:35 ` Anup Patel [this message]
2022-01-12 16:47 ` [PATCH v6 16/23] hw/riscv: virt: Use AIA INTC compatible string when available Frank Chang
2021-12-30 12:35 ` [PATCH v6 17/23] target/riscv: Allow users to force enable AIA CSRs in HART Anup Patel
2022-01-12 13:19 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 18/23] hw/intc: Add RISC-V AIA APLIC device emulation Anup Patel
2022-01-07 8:52 ` Frank Chang
2022-01-08 13:28 ` Anup Patel
2022-01-08 6:35 ` Frank Chang
2022-01-08 12:00 ` Anup Patel
2022-01-14 12:02 ` Frank Chang
2022-01-14 12:59 ` Anup Patel
2021-12-30 12:35 ` [PATCH v6 19/23] hw/riscv: virt: Add optional AIA APLIC support to virt machine Anup Patel
2021-12-30 12:35 ` [PATCH v6 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation Anup Patel
2022-01-13 7:26 ` Frank Chang
2022-01-13 12:22 ` Anup Patel
2021-12-30 12:35 ` [PATCH v6 21/23] hw/riscv: virt: Add optional AIA IMSIC support to virt machine Anup Patel
2021-12-30 12:35 ` [PATCH v6 22/23] docs/system: riscv: Document AIA options for " Anup Patel
2022-01-12 13:23 ` Frank Chang
2021-12-30 12:35 ` [PATCH v6 23/23] hw/riscv: virt: Increase maximum number of allowed CPUs Anup Patel
2022-01-05 21:50 ` Alistair Francis
2022-01-12 13:26 ` Frank Chang
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