From: liweiwei <liweiwei@iscas.ac.cn>
To: richard.henderson@linaro.org, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, liweiwei <liweiwei@iscas.ac.cn>,
lazyparser@gmail.com, luruibo2000@163.com, lustrew@foxmail.com
Subject: [PATCH v3 0/7] support subsets of scalar crypto extension
Date: Thu, 30 Dec 2021 22:30:51 +0800 [thread overview]
Message-ID: <20211230143058.7352-1-liweiwei@iscas.ac.cn> (raw)
This patchset implements RISC-V K-extension v1.0.0.rc6 version instructions.
Partial instructions are reused from B-extension.
Specification:
https://github.com/riscv/riscv-crypto
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v3
To test rvk implementation, specify cpu argument with 'x-zks=true,x-zkn=true'
or
"x-zbkb=true,x-zbkc=true,x-zbkx=true,x-zknd=true,x-zkne=true,x-zknh=true,x-zksed=true,x-zksh=true,x-zkr=true"
to enable K-extension support. This implementation can pass the ACT tests
for K with our extended act support for qemu (available at
https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v3-with-act)
v3:
* add extension check for SEED csr access
v2:
* optimize implementation for brev8, xperm, zip, unzip
* use aes related sbox array from crypto/aes.h
* move sm4_sbox to crypto/sm4.c, and share it with target/arm
liweiwei (7):
target/riscv: rvk: add cfg properties for zbk* and zk*
target/riscv: rvk: add implementation of instructions for Zbk*
crypto include/crypto target/arm: move sm4_sbox to crypto
target/riscv: rvk: add implementation of instructions for Zk*
target/riscv: rvk: add CSR support for Zkr
disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
target/riscv: rvk: expose zbk* and zk* properties
crypto/meson.build | 1 +
crypto/sm4.c | 48 +++
disas/riscv.c | 171 ++++++++-
include/crypto/sm4.h | 6 +
meson | 2 +-
target/arm/crypto_helper.c | 36 +-
target/riscv/bitmanip_helper.c | 74 ++++
target/riscv/cpu.c | 36 ++
target/riscv/cpu.h | 13 +
target/riscv/cpu_bits.h | 9 +
target/riscv/crypto_helper.c | 446 ++++++++++++++++++++++
target/riscv/csr.c | 73 ++++
target/riscv/helper.h | 48 +++
target/riscv/insn32.decode | 94 ++++-
target/riscv/insn_trans/trans_rvb.c.inc | 127 ++++++-
target/riscv/insn_trans/trans_rvk.c.inc | 467 ++++++++++++++++++++++++
target/riscv/meson.build | 1 +
target/riscv/pmp.h | 8 +-
target/riscv/translate.c | 8 +
19 files changed, 1597 insertions(+), 71 deletions(-)
create mode 100644 crypto/sm4.c
create mode 100644 include/crypto/sm4.h
create mode 100644 target/riscv/crypto_helper.c
create mode 100644 target/riscv/insn_trans/trans_rvk.c.inc
--
2.17.1
next reply other threads:[~2021-12-30 14:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-30 14:30 liweiwei [this message]
2021-12-30 14:30 ` [PATCH v3 1/7] target/riscv: rvk: add cfg properties for zbk* and zk* liweiwei
2021-12-31 2:04 ` Bin Meng
2021-12-31 2:29 ` liweiwei
2021-12-30 14:30 ` [PATCH v3 2/7] target/riscv: rvk: add implementation of instructions for Zbk* liweiwei
2021-12-30 14:30 ` [PATCH v3 3/7] crypto include/crypto target/arm: move sm4_sbox to crypto liweiwei
2021-12-30 14:46 ` Philippe Mathieu-Daudé
2021-12-30 15:24 ` liweiwei
2021-12-30 14:30 ` [PATCH v3 4/7] target/riscv: rvk: add implementation of instructions for Zk* liweiwei
2021-12-30 14:30 ` [PATCH v3 5/7] target/riscv: rvk: add CSR support for Zkr liweiwei
2021-12-30 14:30 ` [PATCH v3 6/7] disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions liweiwei
2021-12-30 14:30 ` [PATCH v3 7/7] target/riscv: rvk: expose zbk* and zk* properties liweiwei
2022-01-10 7:06 ` Alistair Francis
2022-01-10 7:44 ` Weiwei Li
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