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From: Fabiano Rosas <farosas@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, danielhb413@gmail.com,
	qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au
Subject: [PATCH 5/9] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp
Date: Mon,  3 Jan 2022 19:07:42 -0300	[thread overview]
Message-ID: <20220103220746.3916246-6-farosas@linux.ibm.com> (raw)
In-Reply-To: <20220103220746.3916246-1-farosas@linux.ibm.com>

The ppc_interrupts_little_endian function is suitable for determining
the endianness of interrupts for all Book3S CPUs.

(I'm keeping the MSR check for the rest of the CPUs, but it will go
away in the next patch.)

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
 target/ppc/excp_helper.c | 21 ++-------------------
 1 file changed, 2 insertions(+), 19 deletions(-)

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 0dbadc5d07..5d31940426 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -760,25 +760,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
      * CPU, the HV mode, etc...
      */
 #ifdef TARGET_PPC64
-    if (excp_model == POWERPC_EXCP_POWER7) {
-        if (!(new_msr & MSR_HVB) && (env->spr[SPR_LPCR] & LPCR_ILE)) {
-            new_msr |= (target_ulong)1 << MSR_LE;
-        }
-    } else if (excp_model == POWERPC_EXCP_POWER8) {
-        if (new_msr & MSR_HVB) {
-            if (env->spr[SPR_HID0] & HID0_HILE) {
-                new_msr |= (target_ulong)1 << MSR_LE;
-            }
-        } else if (env->spr[SPR_LPCR] & LPCR_ILE) {
-            new_msr |= (target_ulong)1 << MSR_LE;
-        }
-    } else if (excp_model == POWERPC_EXCP_POWER9 ||
-               excp_model == POWERPC_EXCP_POWER10) {
-        if (new_msr & MSR_HVB) {
-            if (env->spr[SPR_HID0] & HID0_POWER9_HILE) {
-                new_msr |= (target_ulong)1 << MSR_LE;
-            }
-        } else if (env->spr[SPR_LPCR] & LPCR_ILE) {
+    if (excp_model >= POWERPC_EXCP_970) {
+        if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
             new_msr |= (target_ulong)1 << MSR_LE;
         }
     } else if (msr_ile) {
-- 
2.33.1



  parent reply	other threads:[~2022-01-03 22:09 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-03 22:07 [PATCH 0/9] target/ppc: powerpc_excp improvements (2/n) Fabiano Rosas
2022-01-03 22:07 ` [PATCH 1/9] target/ppc: powerpc_excp: Extract software TLB logging into a function Fabiano Rosas
2022-01-04  9:32   ` Cédric Le Goater
2022-01-03 22:07 ` [PATCH 2/9] target/ppc: powerpc_excp: Keep 60x soft MMU logs active Fabiano Rosas
2022-01-04  9:33   ` Cédric Le Goater
2022-01-03 22:07 ` [PATCH 3/9] target/ppc: powerpc_excp: Group unimplemented exceptions Fabiano Rosas
2022-01-04  9:39   ` Cédric Le Goater
2022-01-03 22:07 ` [PATCH 4/9] target/ppc: Add HV support to ppc_interrupts_little_endian Fabiano Rosas
2022-01-03 22:07 ` Fabiano Rosas [this message]
2022-01-04 10:09   ` [PATCH 5/9] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp Cédric Le Goater
2022-01-04 14:11     ` Fabiano Rosas
2022-01-04 17:30       ` Cédric Le Goater
2022-01-03 22:07 ` [PATCH 6/9] target/ppc: powerpc_excp: Preserve MSR_LE bit Fabiano Rosas
2022-01-04 20:51   ` Fabiano Rosas
2022-01-03 22:07 ` [PATCH 7/9] target/ppc: powerpc_excp: Move ILE setting into a function Fabiano Rosas
2022-01-03 22:07 ` [PATCH 8/9] target/ppc: powerpc_excp: Move AIL under a Book3s block Fabiano Rosas
2022-01-03 22:07 ` [PATCH 9/9] target/ppc: Introduce a wrapper for powerpc_excp Fabiano Rosas

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