From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: git@xen0n.name, peter.maydell@linaro.org
Subject: [PATCH v4 6/7] tcg/tci: Support raising sigbus for user-only
Date: Mon, 3 Jan 2022 18:15:42 -0800 [thread overview]
Message-ID: <20220104021543.396571-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220104021543.396571-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index e76087ccac..92a7c81674 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -292,11 +292,11 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition)
static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr,
MemOpIdx oi, const void *tb_ptr)
{
- MemOp mop = get_memop(oi) & (MO_BSWAP | MO_SSIZE);
+ MemOp mop = get_memop(oi);
uintptr_t ra = (uintptr_t)tb_ptr;
#ifdef CONFIG_SOFTMMU
- switch (mop) {
+ switch (mop & (MO_BSWAP | MO_SSIZE)) {
case MO_UB:
return helper_ret_ldub_mmu(env, taddr, oi, ra);
case MO_SB:
@@ -326,10 +326,14 @@ static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr,
}
#else
void *haddr = g2h(env_cpu(env), taddr);
+ unsigned a_mask = (1u << get_alignment_bits(mop)) - 1;
uint64_t ret;
set_helper_retaddr(ra);
- switch (mop) {
+ if (taddr & a_mask) {
+ helper_unaligned_ld(env, taddr);
+ }
+ switch (mop & (MO_BSWAP | MO_SSIZE)) {
case MO_UB:
ret = ldub_p(haddr);
break;
@@ -377,11 +381,11 @@ static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr,
static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t val,
MemOpIdx oi, const void *tb_ptr)
{
- MemOp mop = get_memop(oi) & (MO_BSWAP | MO_SSIZE);
+ MemOp mop = get_memop(oi);
uintptr_t ra = (uintptr_t)tb_ptr;
#ifdef CONFIG_SOFTMMU
- switch (mop) {
+ switch (mop & (MO_BSWAP | MO_SIZE)) {
case MO_UB:
helper_ret_stb_mmu(env, taddr, val, oi, ra);
break;
@@ -408,9 +412,13 @@ static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t val,
}
#else
void *haddr = g2h(env_cpu(env), taddr);
+ unsigned a_mask = (1u << get_alignment_bits(mop)) - 1;
set_helper_retaddr(ra);
- switch (mop) {
+ if (taddr & a_mask) {
+ helper_unaligned_st(env, taddr);
+ }
+ switch (mop & (MO_BSWAP | MO_SIZE)) {
case MO_UB:
stb_p(haddr, val);
break;
--
2.25.1
next prev parent reply other threads:[~2022-01-04 2:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-04 2:15 [PATCH v4 0/7] Unaligned access for user only Richard Henderson
2022-01-04 2:15 ` [PATCH v4 1/7] tcg/i386: Support raising sigbus for user-only Richard Henderson
2022-01-04 2:15 ` [PATCH v4 2/7] tcg/aarch64: " Richard Henderson
2022-01-06 14:41 ` Peter Maydell
2022-01-04 2:15 ` [PATCH v4 3/7] tcg/ppc: " Richard Henderson
2022-01-04 2:15 ` [PATCH v4 4/7] tcg/riscv: " Richard Henderson
2022-01-04 2:15 ` [PATCH v4 5/7] tcg/s390x: " Richard Henderson
2022-01-04 2:15 ` Richard Henderson [this message]
2022-01-04 14:01 ` [PATCH v4 6/7] tcg/tci: " Philippe Mathieu-Daudé
2022-01-04 2:15 ` [PATCH v4 7/7] tests/tcg/multiarch: Add sigbus.c Richard Henderson
2022-01-04 14:06 ` Philippe Mathieu-Daudé
2022-01-07 12:04 ` Alex Bennée
2022-01-04 3:13 ` [PATCH v4 0/7] Unaligned access for user only WANG Xuerui
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