From: Fabiano Rosas <farosas@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, danielhb413@gmail.com,
qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au
Subject: [PATCH v2 1/7] target/ppc: powerpc_excp: Extract software TLB logging into a function
Date: Wed, 5 Jan 2022 17:40:23 -0300 [thread overview]
Message-ID: <20220105204029.4058500-2-farosas@linux.ibm.com> (raw)
In-Reply-To: <20220105204029.4058500-1-farosas@linux.ibm.com>
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
target/ppc/excp_helper.c | 63 +++++++++++++++++++++++-----------------
1 file changed, 36 insertions(+), 27 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index a779dc936a..2c5d5470de 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -135,6 +135,41 @@ static void dump_hcall(CPUPPCState *env)
env->nip);
}
+static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp)
+{
+#if defined(DEBUG_SOFTWARE_TLB)
+ const char *es;
+ target_ulong *miss, *cmp;
+ int en;
+
+ if (!qemu_log_enabled()) {
+ return;
+ }
+
+ if (excp == POWERPC_EXCP_IFTLB) {
+ es = "I";
+ en = 'I';
+ miss = &env->spr[SPR_IMISS];
+ cmp = &env->spr[SPR_ICMP];
+ } else {
+ if (excp == POWERPC_EXCP_DLTLB) {
+ es = "DL";
+ } else {
+ es = "DS";
+ }
+ en = 'D';
+ miss = &env->spr[SPR_DMISS];
+ cmp = &env->spr[SPR_DCMP];
+ }
+ qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
+ TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
+ TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
+ env->spr[SPR_HASH1], env->spr[SPR_HASH2],
+ env->error_code);
+#endif
+}
+
+
static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
target_ulong *msr)
{
@@ -777,34 +812,8 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp)
}
/* fall through */
case POWERPC_EXCP_7x5:
-#if defined(DEBUG_SOFTWARE_TLB)
- if (qemu_log_enabled()) {
- const char *es;
- target_ulong *miss, *cmp;
- int en;
+ ppc_excp_debug_sw_tlb(env, excp);
- if (excp == POWERPC_EXCP_IFTLB) {
- es = "I";
- en = 'I';
- miss = &env->spr[SPR_IMISS];
- cmp = &env->spr[SPR_ICMP];
- } else {
- if (excp == POWERPC_EXCP_DLTLB) {
- es = "DL";
- } else {
- es = "DS";
- }
- en = 'D';
- miss = &env->spr[SPR_DMISS];
- cmp = &env->spr[SPR_DCMP];
- }
- qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
- TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
- TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
- env->spr[SPR_HASH1], env->spr[SPR_HASH2],
- env->error_code);
- }
-#endif
msr |= env->crf[0] << 28;
msr |= env->error_code; /* key, D/I, S/L bits */
/* Set way using a LRU mechanism */
--
2.33.1
next prev parent reply other threads:[~2022-01-05 20:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-05 20:40 [PATCH v2 0/7] target/ppc: powerpc_excp improvements (2/n) Fabiano Rosas
2022-01-05 20:40 ` Fabiano Rosas [this message]
2022-01-06 3:55 ` [PATCH v2 1/7] target/ppc: powerpc_excp: Extract software TLB logging into a function David Gibson
2022-01-07 1:37 ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 2/7] target/ppc: powerpc_excp: Keep 60x soft MMU logs active Fabiano Rosas
2022-01-06 5:26 ` David Gibson
2022-01-07 1:40 ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 3/7] target/ppc: powerpc_excp: Group unimplemented exceptions Fabiano Rosas
2022-01-06 5:26 ` David Gibson
2022-01-07 3:07 ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 4/7] target/ppc: Add HV support to ppc_interrupts_little_endian Fabiano Rosas
2022-01-06 5:30 ` David Gibson
2022-01-06 13:05 ` Cédric Le Goater
2022-01-05 20:40 ` [PATCH v2 5/7] target/ppc: Add MSR_ILE " Fabiano Rosas
2022-01-06 5:30 ` David Gibson
2022-01-05 20:40 ` [PATCH v2 6/7] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp Fabiano Rosas
2022-01-06 5:31 ` David Gibson
2022-01-05 20:40 ` [PATCH v2 7/7] target/ppc: Introduce a wrapper for powerpc_excp Fabiano Rosas
2022-01-06 5:31 ` David Gibson
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