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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Antonio Caggiano <antonio.caggiano@collabora.com>
Cc: qemu-devel@nongnu.org, Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [PATCH 1/2] virtio-gpu: hostmem
Date: Thu, 6 Jan 2022 04:41:02 -0500	[thread overview]
Message-ID: <20220106043549-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20211110164220.273641-2-antonio.caggiano@collabora.com>

On Wed, Nov 10, 2021 at 05:42:19PM +0100, Antonio Caggiano wrote:
> From: Gerd Hoffmann <kraxel@redhat.com>
> 
> Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu.
> 
> Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>

I guess Gerd can apply this as appropriate.

Acked-by: Michael S. Tsirkin <mst@redhat.com>

> ---
>  hw/display/virtio-gpu-pci.c    | 14 ++++++++++++++
>  hw/display/virtio-gpu.c        |  1 +
>  hw/display/virtio-vga.c        | 32 +++++++++++++++++++++++---------
>  include/hw/virtio/virtio-gpu.h |  5 +++++
>  4 files changed, 43 insertions(+), 9 deletions(-)
> 
> diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c
> index e36eee0c40..a79bd751b2 100644
> --- a/hw/display/virtio-gpu-pci.c
> +++ b/hw/display/virtio-gpu-pci.c
> @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
>      DeviceState *vdev = DEVICE(g);
>      int i;
>  
> +    if (virtio_gpu_hostmem_enabled(g->conf)) {
> +        vpci_dev->msix_bar_idx = 1;
> +        vpci_dev->modern_mem_bar_idx = 2;
> +        memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
> +                           g->conf.hostmem);
> +        pci_register_bar(&vpci_dev->pci_dev, 4,
> +                         PCI_BASE_ADDRESS_SPACE_MEMORY |
> +                         PCI_BASE_ADDRESS_MEM_PREFETCH |
> +                         PCI_BASE_ADDRESS_MEM_TYPE_64,
> +                         &g->hostmem);
> +        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
> +    }
> +
> +    qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp);
>      virtio_pci_force_virtio_1(vpci_dev);
>      if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
>          return;
> diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
> index d78b9700c7..1cfcb81c1b 100644
> --- a/hw/display/virtio-gpu.c
> +++ b/hw/display/virtio-gpu.c
> @@ -1418,6 +1418,7 @@ static Property virtio_gpu_properties[] = {
>                       256 * MiB),
>      DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
>                      VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
> +    DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
>      DEFINE_PROP_END_OF_LIST(),
>  };
>  
> diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c
> index 9e57f61e9e..ca841a0799 100644
> --- a/hw/display/virtio-vga.c
> +++ b/hw/display/virtio-vga.c
> @@ -125,16 +125,30 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
>      pci_register_bar(&vpci_dev->pci_dev, 0,
>                       PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
>  
> -    /*
> -     * Configure virtio bar and regions
> -     *
> -     * We use bar #2 for the mmio regions, to be compatible with stdvga.
> -     * virtio regions are moved to the end of bar #2, to make room for
> -     * the stdvga mmio registers at the start of bar #2.
> -     */
> -    vpci_dev->modern_mem_bar_idx = 2;
> -    vpci_dev->msix_bar_idx = 4;
>      vpci_dev->modern_io_bar_idx = 5;
> +  
> +    if (!virtio_gpu_hostmem_enabled(g->conf)) {
> +        /*
> +        * Configure virtio bar and regions
> +        *
> +        * We use bar #2 for the mmio regions, to be compatible with stdvga.
> +        * virtio regions are moved to the end of bar #2, to make room for
> +        * the stdvga mmio registers at the start of bar #2.
> +        */
> +        vpci_dev->modern_mem_bar_idx = 2;
> +        vpci_dev->msix_bar_idx = 4;
> +    } else {
> +        vpci_dev->msix_bar_idx = 1;
> +        vpci_dev->modern_mem_bar_idx = 2;
> +        memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
> +                           g->conf.hostmem);
> +        pci_register_bar(&vpci_dev->pci_dev, 4,
> +                         PCI_BASE_ADDRESS_SPACE_MEMORY |
> +                         PCI_BASE_ADDRESS_MEM_PREFETCH |
> +                         PCI_BASE_ADDRESS_MEM_TYPE_64,
> +                         &g->hostmem);
> +        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
> +    }
>  
>      if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
>          /*
> diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
> index acfba7c76c..3963cb4f86 100644
> --- a/include/hw/virtio/virtio-gpu.h
> +++ b/include/hw/virtio/virtio-gpu.h
> @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags {
>      (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
>  #define virtio_gpu_blob_enabled(_cfg) \
>      (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
> +#define virtio_gpu_hostmem_enabled(_cfg) \
> +    (_cfg.hostmem > 0)
>  

Don't much like the lower-case macro here, but I guess it's
consistent with rest of the code.

>  struct virtio_gpu_base_conf {
>      uint32_t max_outputs;
>      uint32_t flags;
>      uint32_t xres;
>      uint32_t yres;
> +    uint64_t hostmem;
>  };
>  
>  struct virtio_gpu_ctrl_command {
> @@ -131,6 +134,8 @@ struct VirtIOGPUBase {
>      int renderer_blocked;
>      int enable;
>  
> +    MemoryRegion hostmem;
> +
>      struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
>  
>      int enabled_output_bitmask;
> -- 
> 2.32.0



  reply	other threads:[~2022-01-06  9:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-10 16:42 [PATCH 0/2] virtio-gpu: Shared memory capability Antonio Caggiano
2021-11-10 16:42 ` [PATCH 1/2] virtio-gpu: hostmem Antonio Caggiano
2022-01-06  9:41   ` Michael S. Tsirkin [this message]
2021-11-10 16:42 ` [PATCH 2/2] virtio: Add shared memory capability Antonio Caggiano
2022-01-06  9:48   ` Michael S. Tsirkin
2022-01-06 15:45     ` Antonio Caggiano

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