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From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn>,
	Richard Henderson <richard.henderson@linaro.org>
Subject: [PATCH v14 11/26] target/loongarch: Add floating point comparison instruction translation
Date: Thu,  6 Jan 2022 04:41:45 -0500	[thread overview]
Message-ID: <20220106094200.1801206-12-gaosong@loongson.cn> (raw)
In-Reply-To: <20220106094200.1801206-1-gaosong@loongson.cn>

This includes:
- FCMP.cond.{S/D}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/loongarch/fpu_helper.c                | 60 ++++++++++++++++++++
 target/loongarch/helper.h                    |  9 +++
 target/loongarch/insn_trans/trans_fcmp.c.inc | 56 ++++++++++++++++++
 target/loongarch/insns.decode                |  8 +++
 target/loongarch/internals.h                 |  5 ++
 target/loongarch/translate.c                 |  1 +
 6 files changed, 139 insertions(+)
 create mode 100644 target/loongarch/insn_trans/trans_fcmp.c.inc

diff --git a/target/loongarch/fpu_helper.c b/target/loongarch/fpu_helper.c
index c4e35f8d2b..089a5be199 100644
--- a/target/loongarch/fpu_helper.c
+++ b/target/loongarch/fpu_helper.c
@@ -401,3 +401,63 @@ uint64_t helper_fmuladd_d(CPULoongArchState *env, uint64_t fj,
     update_fcsr0(env, GETPC());
     return fd;
 }
+
+static uint64_t fcmp_common(CPULoongArchState *env, FloatRelation cmp,
+                            uint32_t flags)
+{
+    bool ret;
+
+    switch (cmp) {
+    case float_relation_less:
+        ret = (flags & FCMP_LT);
+        break;
+    case float_relation_equal:
+        ret = (flags & FCMP_EQ);
+        break;
+    case float_relation_greater:
+        ret = (flags & FCMP_GT);
+        break;
+    case float_relation_unordered:
+        ret = (flags & FCMP_UN);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+    update_fcsr0(env, GETPC());
+
+    return ret;
+}
+
+/* fcmp_cXXX_s */
+uint64_t helper_fcmp_c_s(CPULoongArchState *env, uint64_t fj,
+                         uint64_t fk, uint32_t flags)
+{
+    FloatRelation cmp = float32_compare_quiet((uint32_t)fj,
+                                              (uint32_t)fk, &env->fp_status);
+    return fcmp_common(env, cmp, flags);
+}
+
+/* fcmp_sXXX_s */
+uint64_t helper_fcmp_s_s(CPULoongArchState *env, uint64_t fj,
+                         uint64_t fk, uint32_t flags)
+{
+    FloatRelation cmp = float32_compare((uint32_t)fj,
+                                        (uint32_t)fk, &env->fp_status);
+    return fcmp_common(env, cmp, flags);
+}
+
+/* fcmp_cXXX_d */
+uint64_t helper_fcmp_c_d(CPULoongArchState *env, uint64_t fj,
+                         uint64_t fk, uint32_t flags)
+{
+    FloatRelation cmp = float64_compare_quiet(fj, fk, &env->fp_status);
+    return fcmp_common(env, cmp, flags);
+}
+
+/* fcmp_sXXX_d */
+uint64_t helper_fcmp_s_d(CPULoongArchState *env, uint64_t fj,
+                         uint64_t fk, uint32_t flags)
+{
+    FloatRelation cmp = float64_compare(fj, fk, &env->fp_status);
+    return fcmp_common(env, cmp, flags);
+}
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index 840bad9b2f..25a891bf8b 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -52,3 +52,12 @@ DEF_HELPER_FLAGS_2(frecip_d, TCG_CALL_NO_WG, i64, env, i64)
 
 DEF_HELPER_FLAGS_2(fclass_s, TCG_CALL_NO_RWG_SE, i64, env, i64)
 DEF_HELPER_FLAGS_2(fclass_d, TCG_CALL_NO_RWG_SE, i64, env, i64)
+
+/* fcmp.cXXX.s */
+DEF_HELPER_4(fcmp_c_s, i64, env, i64, i64, i32)
+/* fcmp.sXXX.s */
+DEF_HELPER_4(fcmp_s_s, i64, env, i64, i64, i32)
+/* fcmp.cXXX.d */
+DEF_HELPER_4(fcmp_c_d, i64, env, i64, i64, i32)
+/* fcmp.sXXX.d */
+DEF_HELPER_4(fcmp_s_d, i64, env, i64, i64, i32)
diff --git a/target/loongarch/insn_trans/trans_fcmp.c.inc b/target/loongarch/insn_trans/trans_fcmp.c.inc
new file mode 100644
index 0000000000..93a6a2230f
--- /dev/null
+++ b/target/loongarch/insn_trans/trans_fcmp.c.inc
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ */
+
+/* bit0(signaling/quiet) bit1(lt) bit2(eq) bit3(un) bit4(neq) */
+static uint32_t get_fcmp_flags(int cond)
+{
+    uint32_t flags = 0;
+
+    if (cond & 0x1) {
+        flags |= FCMP_LT;
+    }
+    if (cond & 0x2) {
+        flags |= FCMP_EQ;
+    }
+    if (cond & 0x4) {
+        flags |= FCMP_UN;
+    }
+    if (cond & 0x8) {
+        flags |= FCMP_GT | FCMP_LT;
+    }
+    return flags;
+}
+
+static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a)
+{
+    TCGv var = tcg_temp_new();
+    uint32_t flags;
+    void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32);
+
+    fn = (a->fcond & 1 ? gen_helper_fcmp_s_s : gen_helper_fcmp_c_s);
+    flags = get_fcmp_flags(a->fcond >> 1);
+
+    fn(var, cpu_env, cpu_fpr[a->fj], cpu_fpr[a->fk], tcg_constant_i32(flags));
+
+    tcg_gen_st8_tl(var, cpu_env, offsetof(CPULoongArchState, cf[a->cd]));
+    tcg_temp_free(var);
+    return true;
+}
+
+static bool trans_fcmp_cond_d(DisasContext *ctx, arg_fcmp_cond_d *a)
+{
+    TCGv var = tcg_temp_new();
+    uint32_t flags;
+    void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32);
+    fn = (a->fcond & 1 ? gen_helper_fcmp_s_d : gen_helper_fcmp_c_d);
+    flags = get_fcmp_flags(a->fcond >> 1);
+
+    fn(var, cpu_env, cpu_fpr[a->fj], cpu_fpr[a->fk], tcg_constant_i32(flags));
+
+    tcg_gen_st8_tl(var, cpu_env, offsetof(CPULoongArchState, cf[a->cd]));
+
+    tcg_temp_free(var);
+    return true;
+}
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index b67562dc00..33d3e13760 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -26,6 +26,7 @@
 &ff           fd fj
 &fff          fd fj fk
 &ffff         fd fj fk fa
+&cff_fcond    cd fj fk fcond
 
 #
 # Formats
@@ -50,6 +51,7 @@
 @ff               .... ........ ..... ..... fj:5 fd:5    &ff
 @fff               .... ........ ..... fk:5 fj:5 fd:5    &fff
 @ffff               .... ........ fa:5 fk:5 fj:5 fd:5    &ffff
+@cff_fcond    .... ........ fcond:5 fk:5 fj:5 .. cd:3    &cff_fcond
 
 #
 # Fixed point arithmetic operation instruction
@@ -311,3 +313,9 @@ fcopysign_s     0000 00010001 00101 ..... ..... .....    @fff
 fcopysign_d     0000 00010001 00110 ..... ..... .....    @fff
 fclass_s        0000 00010001 01000 01101 ..... .....    @ff
 fclass_d        0000 00010001 01000 01110 ..... .....    @ff
+
+#
+# Floating point compare instruction
+#
+fcmp_cond_s     0000 11000001 ..... ..... ..... 00 ...   @cff_fcond
+fcmp_cond_d     0000 11000010 ..... ..... ..... 00 ...   @cff_fcond
diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
index 17219d4070..774a87ec80 100644
--- a/target/loongarch/internals.h
+++ b/target/loongarch/internals.h
@@ -8,6 +8,11 @@
 #ifndef LOONGARCH_INTERNALS_H
 #define LOONGARCH_INTERNALS_H
 
+#define FCMP_LT   0b0001  /* fp0 < fp1 */
+#define FCMP_EQ   0b0010  /* fp0 = fp1 */
+#define FCMP_UN   0b0100  /* unordered */
+#define FCMP_GT   0b1000  /* fp0 > fp1 */
+
 void loongarch_translate_init(void);
 
 void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index 9ed3907e08..43c7f71645 100644
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -167,6 +167,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext)
 #include "insn_trans/trans_atomic.c.inc"
 #include "insn_trans/trans_extra.c.inc"
 #include "insn_trans/trans_farith.c.inc"
+#include "insn_trans/trans_fcmp.c.inc"
 
 static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
 {
-- 
2.27.0



  parent reply	other threads:[~2022-01-06 10:03 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-06  9:41 [PATCH v14 00/26] Add LoongArch linux-user emulation support Song Gao
2022-01-06  9:41 ` [PATCH v14 01/26] target/loongarch: Add README Song Gao
2022-01-09  9:24   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 02/26] target/loongarch: Add core definition Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-09 18:49     ` Richard Henderson
2022-01-10 12:34       ` gaosong
2022-01-10 15:20         ` WANG Xuerui
2022-01-10 13:00     ` gaosong
2022-01-10 15:11       ` WANG Xuerui
2022-01-12  9:28     ` gaosong
2022-01-12 10:17       ` gaosong
2022-01-12 10:26         ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 03/26] target/loongarch: Add main translation routines Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 04/26] target/loongarch: Add fixed point arithmetic instruction translation Song Gao
2022-01-06  9:41 ` [PATCH v14 05/26] target/loongarch: Add fixed point shift " Song Gao
2022-01-06  9:41 ` [PATCH v14 06/26] target/loongarch: Add fixed point bit " Song Gao
2022-01-06  9:41 ` [PATCH v14 07/26] target/loongarch: Add fixed point load/store " Song Gao
2022-01-06  9:41 ` [PATCH v14 08/26] target/loongarch: Add fixed point atomic " Song Gao
2022-01-06  9:41 ` [PATCH v14 09/26] target/loongarch: Add fixed point extra " Song Gao
2022-01-06  9:41 ` [PATCH v14 10/26] target/loongarch: Add floating point arithmetic " Song Gao
2022-01-06  9:41 ` Song Gao [this message]
2022-01-06  9:41 ` [PATCH v14 12/26] target/loongarch: Add floating point conversion " Song Gao
2022-01-06  9:41 ` [PATCH v14 13/26] target/loongarch: Add floating point move " Song Gao
2022-01-06  9:41 ` [PATCH v14 14/26] target/loongarch: Add floating point load/store " Song Gao
2022-01-06  9:41 ` [PATCH v14 15/26] target/loongarch: Add branch " Song Gao
2022-01-06  9:41 ` [PATCH v14 16/26] target/loongarch: Add disassembler Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-09 18:51     ` Richard Henderson
2022-01-06  9:41 ` [PATCH v14 17/26] linux-user: Add LoongArch generic header files Song Gao
2022-01-06  9:41 ` [PATCH v14 18/26] linux-user: Add LoongArch specific structures Song Gao
2022-01-07  4:29   ` Richard Henderson
2022-01-06  9:41 ` [PATCH v14 19/26] linux-user: Add LoongArch signal support Song Gao
2022-01-07  4:58   ` Richard Henderson
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 20/26] linux-user: Add LoongArch elf support Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 21/26] linux-user: Add LoongArch syscall support Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 22/26] linux-user: Add LoongArch cpu_loop support Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 23/26] default-configs: Add loongarch linux-user support Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 24/26] target/loongarch: Add target build suport Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:41 ` [PATCH v14 25/26] target/loongarch: 'make check-tcg' support Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-06  9:42 ` [PATCH v14 26/26] scripts: add loongarch64 binfmt config Song Gao
2022-01-09  9:25   ` WANG Xuerui
2022-01-07  5:01 ` [PATCH v14 00/26] Add LoongArch linux-user emulation support Richard Henderson
2022-01-07  7:59   ` gaosong
2022-01-09  5:09     ` WANG Xuerui

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