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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 01/19] Add dummy Aspeed AST2600 Display Port MCU (DPMCU)
Date: Fri,  7 Jan 2022 17:21:24 +0000	[thread overview]
Message-ID: <20220107172142.2651911-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220107172142.2651911-1-peter.maydell@linaro.org>

From: Troy Lee <troy_lee@aspeedtech.com>

AST2600 Display Port MCU introduces 0x18000000~0x1803FFFF as it's memory
and io address. If guest machine try to access DPMCU memory, it will
cause a fatal error.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20211210083034.726610-1-troy_lee@aspeedtech.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/aspeed_soc.h | 2 ++
 hw/arm/aspeed_ast2600.c     | 8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 8139358549d..18fb7eed461 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -139,6 +139,8 @@ enum {
     ASPEED_DEV_EMMC,
     ASPEED_DEV_KCS,
     ASPEED_DEV_HACE,
+    ASPEED_DEV_DPMCU,
+    ASPEED_DEV_DP,
 };
 
 #endif /* ASPEED_SOC_H */
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 0384357a951..e33483fb5dd 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -19,9 +19,11 @@
 #include "sysemu/sysemu.h"
 
 #define ASPEED_SOC_IOMEM_SIZE       0x00200000
+#define ASPEED_SOC_DPMCU_SIZE       0x00040000
 
 static const hwaddr aspeed_soc_ast2600_memmap[] = {
     [ASPEED_DEV_SRAM]      = 0x10000000,
+    [ASPEED_DEV_DPMCU]     = 0x18000000,
     /* 0x16000000     0x17FFFFFF : AHB BUS do LPC Bus bridge */
     [ASPEED_DEV_IOMEM]     = 0x1E600000,
     [ASPEED_DEV_PWM]       = 0x1E610000,
@@ -44,6 +46,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
     [ASPEED_DEV_SCU]       = 0x1E6E2000,
     [ASPEED_DEV_XDMA]      = 0x1E6E7000,
     [ASPEED_DEV_ADC]       = 0x1E6E9000,
+    [ASPEED_DEV_DP]        = 0x1E6EB000,
     [ASPEED_DEV_VIDEO]     = 0x1E700000,
     [ASPEED_DEV_SDHCI]     = 0x1E740000,
     [ASPEED_DEV_EMMC]      = 0x1E750000,
@@ -104,6 +107,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
     [ASPEED_DEV_ETH3]      = 32,
     [ASPEED_DEV_ETH4]      = 33,
     [ASPEED_DEV_KCS]       = 138,   /* 138 -> 142 */
+    [ASPEED_DEV_DP]        = 62,
 };
 
 static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
@@ -298,6 +302,10 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
     memory_region_add_subregion(get_system_memory(),
                                 sc->memmap[ASPEED_DEV_SRAM], &s->sram);
 
+    /* DPMCU */
+    create_unimplemented_device("aspeed.dpmcu", sc->memmap[ASPEED_DEV_DPMCU],
+                                ASPEED_SOC_DPMCU_SIZE);
+
     /* SCU */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
         return;
-- 
2.25.1



  reply	other threads:[~2022-01-07 17:24 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07 17:21 [PULL 00/19] target-arm queue Peter Maydell
2022-01-07 17:21 ` Peter Maydell [this message]
2022-01-07 17:21 ` [PULL 02/19] target/arm: Add missing FEAT_TLBIOS instructions Peter Maydell
2022-01-07 17:21 ` [PULL 03/19] hw/intc/arm_gicv3_its: Correct off-by-one bounds check on rdbase Peter Maydell
2022-01-07 17:21 ` [PULL 04/19] hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED define Peter Maydell
2022-01-07 17:21 ` [PULL 05/19] hw/intc/arm_gicv3_its: Remove maxids union from TableDesc Peter Maydell
2022-01-07 17:21 ` [PULL 06/19] hw/intc/arm_gicv3_its: Don't return early in extract_table_params() loop Peter Maydell
2022-01-07 17:21 ` [PULL 07/19] hw/intc/arm_gicv3_its: Reduce code duplication in extract_table_params() Peter Maydell
2022-01-07 17:21 ` [PULL 08/19] hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_sz Peter Maydell
2022-01-07 17:21 ` [PULL 09/19] hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define Peter Maydell
2022-01-07 17:21 ` [PULL 10/19] hw/intc/arm_gicv3_its: Correct handling of MAPI Peter Maydell
2022-01-07 17:21 ` [PULL 11/19] hw/intc/arm_gicv3_its: Use FIELD macros for DTEs Peter Maydell
2022-01-07 17:21 ` [PULL 12/19] hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field size Peter Maydell
2022-01-07 17:21 ` [PULL 13/19] hw/intc/arm_gicv3_its: Use FIELD macros for CTEs Peter Maydell
2022-01-07 17:21 ` [PULL 14/19] hw/intc/arm_gicv3_its: Fix various off-by-one errors Peter Maydell
2022-01-07 17:21 ` [PULL 15/19] hw/intc/arm_gicv3_its: Rename max_l2_entries to num_l2_entries Peter Maydell
2022-01-07 17:21 ` [PULL 16/19] hw/arm: Add kudo i2c eeproms Peter Maydell
2022-01-07 17:21 ` [PULL 17/19] hw/arm: attach MMC to kudo-bmc Peter Maydell
2022-01-07 17:21 ` [PULL 18/19] hw/arm: add i2c muxes " Peter Maydell
2022-01-07 17:21 ` [PULL 19/19] hw/arm: kudo add lm75s on bus 13 Peter Maydell
2022-01-07 21:17 ` [PULL 00/19] target-arm queue Richard Henderson

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