Re: [PATCH v3 0/2] Aspeed I3C device model

[Graeme Gregory <quic_ggregory@quicinc.com>]

On Tue, Jan 11, 2022 at 04:45:44PM +0800, Troy Lee wrote:
> This series of patch introduce a dummy implemenation of aspeed i3c
> model, and it provide just enough information for guest machine.
> However, the driver probing is still failed, but it will not cause
> kernel panic.
> 

These patches arrived just in time for our i3c testing. This stops
our CI halting due to kernel panic on i3c probing.

Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com>
Tested-by: Graeme Gregory <quic_ggregory@quicinc.com>

> v3:
> - Remove unused AspeedI3CClass
> - Refine memory region
> - Refine register reset
> - Remove unrelated changes to SPI2 address
> - Remove i3c controller irq line
> 
> v2:
> - Split i3c model into i3c and i3c_device
> - Create 6x i3c devices
> - Using register fields macro
> - Rebase to mainline QEMU
> 
> Troy Lee (2):
>   Introduce a dummy AST2600 I3C model.
>   This patch includes i3c instance in ast2600 soc.
> 
>  hw/arm/aspeed_ast2600.c      |  16 ++
>  hw/misc/aspeed_i3c.c         | 381 +++++++++++++++++++++++++++++++++++
>  hw/misc/meson.build          |   1 +
>  hw/misc/trace-events         |   6 +
>  include/hw/arm/aspeed_soc.h  |   3 +
>  include/hw/misc/aspeed_i3c.h |  48 +++++
>  6 files changed, 455 insertions(+)
>  create mode 100644 hw/misc/aspeed_i3c.c
>  create mode 100644 include/hw/misc/aspeed_i3c.h
> 
> -- 
> 2.25.1
> 
>