From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 18/34] ppc/pnv: Attach PHB3 root port device when defaults are enabled
Date: Wed, 12 Jan 2022 12:55:35 +0100 [thread overview]
Message-ID: <20220112115551.987666-19-clg@kaod.org> (raw)
In-Reply-To: <20220112115551.987666-1-clg@kaod.org>
This cleanups the PHB3 model a bit more since the root port is an
independent device and it will ease our task when adding user created
PHB3s.
pnv_phb_attach_root_port() is made public in pnv.c so it can be reused
with the pnv_phb4 root port later.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220105212338.49899-4-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/pci-host/pnv_phb3.h | 2 --
include/hw/ppc/pnv.h | 1 +
hw/pci-host/pnv_phb3.c | 15 ++++++---------
hw/ppc/pnv.c | 8 ++++++++
4 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
index e9c13e6bd821..2e423c3890bc 100644
--- a/include/hw/pci-host/pnv_phb3.h
+++ b/include/hw/pci-host/pnv_phb3.h
@@ -155,8 +155,6 @@ struct PnvPHB3 {
PnvPBCQState pbcq;
- PnvPHB3RootPort root;
-
QLIST_HEAD(, PnvPhb3DMASpace) dma_spaces;
PnvChip *chip;
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index c781525277db..c726288e5e5a 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -177,6 +177,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
TYPE_PNV_CHIP_POWER10)
PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
+void pnv_phb_attach_root_port(PCIHostState *pci, const char *name);
#define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
typedef struct PnvMachineClass PnvMachineClass;
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 3467bbb5d9d8..fdc8d0b437e4 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -19,6 +19,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "qom/object.h"
+#include "sysemu/sysemu.h"
#define phb3_error(phb, fmt, ...) \
qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \
@@ -981,10 +982,6 @@ static void pnv_phb3_instance_init(Object *obj)
/* Power Bus Common Queue */
object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ);
- /* Root Port */
- object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PORT);
- qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0));
- qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false);
}
static void pnv_phb3_realize(DeviceState *dev, Error **errp)
@@ -1053,10 +1050,10 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb);
- /* Add a single Root port */
- qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id);
- qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id);
- qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal);
+ if (defaults_enabled()) {
+ pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
+ TYPE_PNV_PHB3_ROOT_PORT);
+ }
}
void pnv_phb3_update_regions(PnvPHB3 *phb)
@@ -1177,7 +1174,7 @@ static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data)
device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
&rpc->parent_realize);
- dc->user_creatable = false;
+ dc->user_creatable = true;
k->vendor_id = PCI_VENDOR_ID_IBM;
k->device_id = 0x03dc;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 9de8b8353014..3a263f631a27 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1156,6 +1156,14 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
}
}
+/* Attach a root port device */
+void pnv_phb_attach_root_port(PCIHostState *pci, const char *name)
+{
+ PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name);
+
+ pci_realize_and_unref(root, pci->bus, &error_fatal);
+}
+
static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
{
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
--
2.31.1
next prev parent reply other threads:[~2022-01-12 12:12 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-12 11:55 [PULL 00/34] ppc queue Cédric Le Goater
2022-01-12 11:55 ` [PULL 01/34] pseries: Update SLOF firmware image Cédric Le Goater
2022-01-12 11:55 ` [PULL 02/34] target/ppc: Add popcntb instruction to POWER5+ processors Cédric Le Goater
2022-01-12 11:55 ` [PULL 03/34] spapr: Fix support of " Cédric Le Goater
2022-01-12 11:55 ` [PULL 04/34] target/ppc: Add extra float instructions to POWER5P processors Cédric Le Goater
2022-01-12 11:55 ` [PULL 05/34] docs/system/ppc: Merge the PEF information into the pseries page Cédric Le Goater
2022-01-12 11:55 ` [PULL 06/34] MAINTAINERS: Improve the PowerPC machines section Cédric Le Goater
2022-01-12 11:55 ` [PULL 07/34] docs: Clarifications and formatting changes in ppc docs Cédric Le Goater
2022-01-12 11:55 ` [PULL 08/34] target/ppc: powerpc_excp: Extract software TLB logging into a function Cédric Le Goater
2022-01-12 11:55 ` [PULL 09/34] target/ppc: powerpc_excp: Keep 60x/7x5 soft MMU logs active Cédric Le Goater
2022-01-12 11:55 ` [PULL 10/34] target/ppc: powerpc_excp: Group unimplemented exceptions Cédric Le Goater
2022-01-12 11:55 ` [PULL 11/34] target/ppc: Add HV support to ppc_interrupts_little_endian Cédric Le Goater
2022-01-12 11:55 ` [PULL 12/34] target/ppc: Add MSR_ILE " Cédric Le Goater
2022-01-12 11:55 ` [PULL 13/34] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp Cédric Le Goater
2022-01-12 11:55 ` [PULL 14/34] target/ppc: Introduce a wrapper for powerpc_excp Cédric Le Goater
2022-01-12 11:55 ` [PULL 15/34] target/ppc: Set the correct endianness for powernv memory dumps Cédric Le Goater
2022-01-12 11:55 ` [PULL 16/34] pnv_phb3.c: add unique chassis and slot for pnv_phb3_root_port Cédric Le Goater
2022-01-12 11:55 ` [PULL 17/34] pnv_phb4.c: add unique chassis and slot for pnv_phb4_root_port Cédric Le Goater
2022-01-12 11:55 ` Cédric Le Goater [this message]
2022-01-12 11:55 ` [PULL 19/34] pnv_phb4.c: make pnv-phb4-root-port user creatable Cédric Le Goater
2022-01-12 11:55 ` [PULL 20/34] pnv_phb4.c: check if root port exists in rc_config functions Cédric Le Goater
2022-01-12 11:55 ` [PULL 21/34] ppc/pnv: Introduce support for user created PHB3 devices Cédric Le Goater
2022-01-12 11:55 ` [PULL 22/34] ppc/pnv: Reparent user created PHB3 devices to the PnvChip Cédric Le Goater
2022-01-12 11:55 ` [PULL 23/34] ppc/pnv: Complete user created PHB3 devices Cédric Le Goater
2022-01-12 11:55 ` [PULL 24/34] ppc/pnv: Move num_phbs under Pnv8Chip Cédric Le Goater
2022-01-12 11:55 ` [PULL 25/34] pnv_phb3.h: change TYPE_PNV_PHB3_ROOT_BUS name Cédric Le Goater
2022-01-12 11:55 ` [PULL 26/34] pnv_phb4.c: change TYPE_PNV_PHB4_ROOT_BUS name Cédric Le Goater
2022-01-12 11:55 ` [PULL 27/34] pnv_phb4_pec.c: move pnv_pec_phb_offset() to pnv_phb4.c Cédric Le Goater
2022-01-12 11:55 ` [PULL 28/34] pnv_phb4_pec: use pnv_phb4_pec_get_phb_id() in pnv_pec_dt_xscom() Cédric Le Goater
2022-01-12 11:55 ` [PULL 29/34] ppc/pnv: set phb4 properties in stk_realize() Cédric Le Goater
2022-01-12 11:55 ` [PULL 30/34] ppc/pnv: move PHB4 XSCOM init to phb4_realize() Cédric Le Goater
2022-01-12 11:55 ` [PULL 31/34] ppc/pnv: turn 'phb' into a pointer in struct PnvPhb4PecStack Cédric Le Goater
2022-01-12 11:55 ` [PULL 32/34] ppc/pnv: Introduce user creatable pnv-phb4 devices Cédric Le Goater
2022-01-12 11:55 ` [PULL 33/34] ppc/pnv: turn pnv_phb4_update_regions() into static Cédric Le Goater
2022-01-12 11:55 ` [PULL 34/34] ppc/pnv: use stack->pci_regs[] in pnv_pec_stk_pci_xscom_write() Cédric Le Goater
2022-01-13 13:59 ` [PULL 00/34] ppc queue Peter Maydell
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