From: Matthew Rosato <mjrosato@linux.ibm.com>
To: qemu-s390x@nongnu.org
Cc: farman@linux.ibm.com, kvm@vger.kernel.org, pmorel@linux.ibm.com,
schnelle@linux.ibm.com, cohuck@redhat.com,
richard.henderson@linaro.org, thuth@redhat.com,
qemu-devel@nongnu.org, pasic@linux.ibm.com,
alex.williamson@redhat.com, mst@redhat.com, pbonzini@redhat.com,
david@redhat.com, borntraeger@linux.ibm.com
Subject: [PATCH v2 7/9] s390x/pci: use I/O Address Translation assist when interpreting
Date: Fri, 14 Jan 2022 15:38:47 -0500 [thread overview]
Message-ID: <20220114203849.243657-8-mjrosato@linux.ibm.com> (raw)
In-Reply-To: <20220114203849.243657-1-mjrosato@linux.ibm.com>
Allow the underlying kvm host to handle the Refresh PCI Translation
instruction intercepts.
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>
---
hw/s390x/s390-pci-bus.c | 6 ++--
hw/s390x/s390-pci-inst.c | 51 ++++++++++++++++++++++++++++++--
hw/s390x/s390-pci-vfio.c | 27 +++++++++++++++++
include/hw/s390x/s390-pci-inst.h | 2 +-
include/hw/s390x/s390-pci-vfio.h | 10 +++++++
5 files changed, 89 insertions(+), 7 deletions(-)
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 6ee70446ca..49ae2fd0ea 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -196,7 +196,7 @@ void s390_pci_sclp_deconfigure(SCCB *sccb)
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
- pci_dereg_ioat(pbdev->iommu);
+ pci_dereg_ioat(pbdev);
}
pbdev->state = ZPCI_FS_STANDBY;
rc = SCLP_RC_NORMAL_COMPLETION;
@@ -1262,7 +1262,7 @@ static void s390_pcihost_reset(DeviceState *dev)
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
- pci_dereg_ioat(pbdev->iommu);
+ pci_dereg_ioat(pbdev);
}
pbdev->state = ZPCI_FS_STANDBY;
s390_pci_perform_unplug(pbdev);
@@ -1403,7 +1403,7 @@ static void s390_pci_device_reset(DeviceState *dev)
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
- pci_dereg_ioat(pbdev->iommu);
+ pci_dereg_ioat(pbdev);
}
fmb_timer_free(pbdev);
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index 121e07cc41..0fa18866c0 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -978,6 +978,24 @@ int pci_dereg_irqs(S390PCIBusDevice *pbdev)
return 0;
}
+static int reg_ioat_interp(S390PCIBusDevice *pbdev, uint64_t iota)
+{
+ int rc;
+
+ rc = s390_pci_probe_ioat(pbdev);
+ if (rc) {
+ return rc;
+ }
+
+ rc = s390_pci_set_ioat(pbdev, iota);
+ if (rc) {
+ return rc;
+ }
+
+ pbdev->iommu->enabled = true;
+ return 0;
+}
+
static int reg_ioat(CPUS390XState *env, S390PCIBusDevice *pbdev, ZpciFib fib,
uintptr_t ra)
{
@@ -995,6 +1013,16 @@ static int reg_ioat(CPUS390XState *env, S390PCIBusDevice *pbdev, ZpciFib fib,
return -EINVAL;
}
+ /* If this is an interpreted device, we must use the IOAT assist */
+ if (pbdev->interp) {
+ if (reg_ioat_interp(pbdev, g_iota)) {
+ error_report("failure starting ioat assist");
+ s390_program_interrupt(env, PGM_OPERAND, ra);
+ return -EINVAL;
+ }
+ return 0;
+ }
+
/* currently we only support designation type 1 with translation */
if (!(dt == ZPCI_IOTA_RTTO && t)) {
error_report("unsupported ioat dt %d t %d", dt, t);
@@ -1011,8 +1039,25 @@ static int reg_ioat(CPUS390XState *env, S390PCIBusDevice *pbdev, ZpciFib fib,
return 0;
}
-void pci_dereg_ioat(S390PCIIOMMU *iommu)
+static void dereg_ioat_interp(S390PCIBusDevice *pbdev)
{
+ if (s390_pci_probe_ioat(pbdev) != 0) {
+ return;
+ }
+
+ s390_pci_set_ioat(pbdev, 0);
+ pbdev->iommu->enabled = false;
+}
+
+void pci_dereg_ioat(S390PCIBusDevice *pbdev)
+{
+ S390PCIIOMMU *iommu = pbdev->iommu;
+
+ if (pbdev->interp) {
+ dereg_ioat_interp(pbdev);
+ return;
+ }
+
s390_pci_iommu_disable(iommu);
iommu->pba = 0;
iommu->pal = 0;
@@ -1251,7 +1296,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
} else {
- pci_dereg_ioat(pbdev->iommu);
+ pci_dereg_ioat(pbdev);
}
break;
case ZPCI_MOD_FC_REREG_IOAT:
@@ -1262,7 +1307,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
} else {
- pci_dereg_ioat(pbdev->iommu);
+ pci_dereg_ioat(pbdev);
if (reg_ioat(env, pbdev, fib, ra)) {
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_INSUF_RES);
diff --git a/hw/s390x/s390-pci-vfio.c b/hw/s390x/s390-pci-vfio.c
index 73f3b3ed19..4e3165bff5 100644
--- a/hw/s390x/s390-pci-vfio.c
+++ b/hw/s390x/s390-pci-vfio.c
@@ -228,6 +228,33 @@ int s390_pci_get_aif(S390PCIBusDevice *pbdev, bool enable, bool assist)
return rc;
}
+int s390_pci_probe_ioat(S390PCIBusDevice *pbdev)
+{
+ VFIOPCIDevice *vdev = VFIO_PCI(pbdev->pdev);
+ struct vfio_device_feature feat = {
+ .argsz = sizeof(struct vfio_device_feature),
+ .flags = VFIO_DEVICE_FEATURE_PROBE + VFIO_DEVICE_FEATURE_ZPCI_IOAT
+ };
+
+ return ioctl(vdev->vbasedev.fd, VFIO_DEVICE_FEATURE, &feat);
+}
+
+int s390_pci_set_ioat(S390PCIBusDevice *pbdev, uint64_t iota)
+{
+ VFIOPCIDevice *vdev = VFIO_PCI(pbdev->pdev);
+ struct vfio_device_zpci_ioat *data;
+ int size = sizeof(struct vfio_device_feature) + sizeof(*data);
+ g_autofree struct vfio_device_feature *feat = g_malloc0(size);
+
+ feat->argsz = size;
+ feat->flags = VFIO_DEVICE_FEATURE_SET + VFIO_DEVICE_FEATURE_ZPCI_IOAT;
+
+ data = (struct vfio_device_zpci_ioat *)&feat->data;
+ data->iota = iota;
+
+ return ioctl(vdev->vbasedev.fd, VFIO_DEVICE_FEATURE, feat);
+}
+
static void s390_pci_read_base(S390PCIBusDevice *pbdev,
struct vfio_device_info *info)
{
diff --git a/include/hw/s390x/s390-pci-inst.h b/include/hw/s390x/s390-pci-inst.h
index a55c448aad..13566fb7b4 100644
--- a/include/hw/s390x/s390-pci-inst.h
+++ b/include/hw/s390x/s390-pci-inst.h
@@ -99,7 +99,7 @@ typedef struct ZpciFib {
} QEMU_PACKED ZpciFib;
int pci_dereg_irqs(S390PCIBusDevice *pbdev);
-void pci_dereg_ioat(S390PCIIOMMU *iommu);
+void pci_dereg_ioat(S390PCIBusDevice *pbdev);
int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra);
int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra);
int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra);
diff --git a/include/hw/s390x/s390-pci-vfio.h b/include/hw/s390x/s390-pci-vfio.h
index 6cec38a863..e7a2d8ff77 100644
--- a/include/hw/s390x/s390-pci-vfio.h
+++ b/include/hw/s390x/s390-pci-vfio.h
@@ -28,6 +28,8 @@ int s390_pci_probe_aif(S390PCIBusDevice *pbdev);
int s390_pci_set_aif(S390PCIBusDevice *pbdev, ZpciFib *fib, bool enable,
bool assist);
int s390_pci_get_aif(S390PCIBusDevice *pbdev, bool enable, bool assist);
+int s390_pci_probe_ioat(S390PCIBusDevice *pbdev);
+int s390_pci_set_ioat(S390PCIBusDevice *pbdev, uint64_t iota);
void s390_pci_get_clp_info(S390PCIBusDevice *pbdev);
#else
@@ -68,6 +70,14 @@ static inline int s390_pci_get_aif(S390PCIBusDevice *pbdev, bool enable,
{
return -EINVAL;
}
+static inline int s390_pci_probe_ioat(S390PCIBusDevice *pbdev)
+{
+ return -EINVAL;
+}
+static inline int s390_pci_set_ioat(S390PCIBusDevice *pbdev, uint64_t iota)
+{
+ return -EINVAL;
+}
static inline void s390_pci_get_clp_info(S390PCIBusDevice *pbdev) { }
#endif
--
2.27.0
next prev parent reply other threads:[~2022-01-14 20:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-14 20:38 [PATCH v2 0/9] s390x/pci: zPCI interpretation support Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 1/9] Update linux headers Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 2/9] target/s390x: add zpci-interp to cpu models Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 3/9] fixup: force interp off for QEMU machine 6.2 and older Matthew Rosato
2022-01-14 21:04 ` Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 4/9] s390x/pci: enable for load/store intepretation Matthew Rosato
2022-01-17 14:51 ` Thomas Huth
2022-01-18 18:08 ` Matthew Rosato
2022-01-17 15:38 ` Thomas Huth
2022-01-18 18:14 ` Matthew Rosato
2022-01-31 9:37 ` Pierre Morel
2022-01-31 14:46 ` Pierre Morel
2022-01-31 17:11 ` Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 5/9] s390x/pci: don't fence interpreted devices without MSI-X Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 6/9] s390x/pci: enable adapter event notification for interpreted devices Matthew Rosato
2022-01-31 15:10 ` Pierre Morel
2022-01-31 17:08 ` Matthew Rosato
2022-01-14 20:38 ` Matthew Rosato [this message]
2022-01-14 20:38 ` [PATCH v2 8/9] s390x/pci: use dtsm provided from vfio capabilities " Matthew Rosato
2022-01-14 20:38 ` [PATCH v2 9/9] s390x/pci: let intercept devices have separate PCI groups Matthew Rosato
2022-01-17 15:23 ` [PATCH v2 0/9] s390x/pci: zPCI interpretation support Thomas Huth
2022-01-18 18:32 ` Matthew Rosato
2022-02-04 12:39 ` Michael S. Tsirkin
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