From: Weiwei Li <liweiwei@iscas.ac.cn>
To: richard.henderson@linaro.org, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, Weiwei Li <liweiwei@iscas.ac.cn>,
lazyparser@gmail.com, luruibo2000@163.com, lustrew@foxmail.com
Subject: [RFC PATCH v5 01/14] target/riscv: rvk: add cfg properties for zbk* and zk*
Date: Wed, 19 Jan 2022 19:37:41 +0800 [thread overview]
Message-ID: <20220119113754.20323-2-liweiwei@iscas.ac.cn> (raw)
In-Reply-To: <20220119113754.20323-1-liweiwei@iscas.ac.cn>
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 23 +++++++++++++++++++++++
target/riscv/cpu.h | 13 +++++++++++++
2 files changed, 36 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 9bc25d3055..b487a8282c 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -518,6 +518,29 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
cpu->cfg.ext_d = true;
}
+ if (cpu->cfg.ext_zk) {
+ cpu->cfg.ext_zkn = true;
+ cpu->cfg.ext_zkr = true;
+ cpu->cfg.ext_zkt = true;
+ }
+
+ if (cpu->cfg.ext_zkn) {
+ cpu->cfg.ext_zbkb = true;
+ cpu->cfg.ext_zbkc = true;
+ cpu->cfg.ext_zbkx = true;
+ cpu->cfg.ext_zkne = true;
+ cpu->cfg.ext_zknd = true;
+ cpu->cfg.ext_zknh = true;
+ }
+
+ if (cpu->cfg.ext_zks) {
+ cpu->cfg.ext_zbkb = true;
+ cpu->cfg.ext_zbkc = true;
+ cpu->cfg.ext_zbkx = true;
+ cpu->cfg.ext_zksed = true;
+ cpu->cfg.ext_zksh = true;
+ }
+
/* Set the ISA extensions, checks should have happened above */
if (cpu->cfg.ext_i) {
ext |= RVI;
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 4d63086765..2c14fe8ed9 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -323,7 +323,20 @@ struct RISCVCPU {
bool ext_zba;
bool ext_zbb;
bool ext_zbc;
+ bool ext_zbkb;
+ bool ext_zbkc;
+ bool ext_zbkx;
bool ext_zbs;
+ bool ext_zk;
+ bool ext_zkn;
+ bool ext_zknd;
+ bool ext_zkne;
+ bool ext_zknh;
+ bool ext_zkr;
+ bool ext_zks;
+ bool ext_zksed;
+ bool ext_zksh;
+ bool ext_zkt;
bool ext_counters;
bool ext_ifencei;
bool ext_icsr;
--
2.17.1
next prev parent reply other threads:[~2022-01-19 11:49 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 11:37 [RFC PATCH v5 00/14] support subsets of scalar crypto extension Weiwei Li
2022-01-19 11:37 ` Weiwei Li [this message]
2022-01-19 11:37 ` [RFC PATCH v5 02/14] target/riscv: rvk: add support for zbkb extension Weiwei Li
2022-01-21 0:08 ` Alistair Francis
2022-01-19 11:37 ` [RFC PATCH v5 03/14] target/riscv: rvk: add support for zbkc extension Weiwei Li
2022-01-21 0:11 ` Alistair Francis
2022-01-19 11:37 ` [RFC PATCH v5 04/14] target/riscv: rvk: add support for zbkx extension Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 05/14] crypto: move sm4_sbox from target/arm Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32 Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64 Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 " Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 " Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 11/14] target/riscv: rvk: add support for zksed/zksh extension Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 12/14] target/riscv: rvk: add CSR support for Zkr Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 13/14] disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions Weiwei Li
2022-01-19 11:37 ` [RFC PATCH v5 14/14] target/riscv: rvk: expose zbk* and zk* properties Weiwei Li
2022-01-21 0:35 ` Alistair Francis
2022-01-21 8:15 ` Weiwei Li
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