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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id pg25sm6304743ejb.174.2022.01.25.05.35.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jan 2022 05:35:34 -0800 (PST) Date: Tue, 25 Jan 2022 14:35:33 +0100 From: Igor Mammedov To: Patrick Venture Subject: Re: [PATCH v2] hw/smbios: Add table 4 parameter, "processor-id" Message-ID: <20220125143533.5d8e2848@redhat.com> In-Reply-To: <20220124201151.833769-1-venture@google.com> References: <20220124201151.833769-1-venture@google.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.158, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ani@anisinha.ca, Titus Rwantare , Peter Foley , qemu-devel@nongnu.org, mst@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 24 Jan 2022 12:11:51 -0800 Patrick Venture wrote: > This parameter is to be used in the processor_id lower 32-bit entry in > the type 4 table. The upper 32-bits represent the features for the CPU. > This patch leaves those as 0 when the lower 32-bits are set. Did you forget to update commit message ^^^^ ? Other than that patch looks good to me, so with commit message fixed: Reviewed-by: Igor Mammedov > This parameter is set as optional and if left will use the values from > the CPU model. > > This enables hiding the host information from the guest and allowing AMD > VMs to run pretending to be Intel for some userspace software concerns. > > Reviewed-by: Peter Foley > Reviewed-by: Titus Rwantare > Signed-off-by: Patrick Venture > --- > v2: Added to SRST options list, upgraded to full 64-bit value. > --- > hw/smbios/smbios.c | 19 ++++++++++++++++--- > qemu-options.hx | 3 ++- > 2 files changed, 18 insertions(+), 4 deletions(-) > > diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c > index 7397e56737..385b69b0c9 100644 > --- a/hw/smbios/smbios.c > +++ b/hw/smbios/smbios.c > @@ -104,9 +104,11 @@ static struct { > const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; > uint64_t max_speed; > uint64_t current_speed; > + uint64_t processor_id; > } type4 = { > .max_speed = DEFAULT_CPU_SPEED, > - .current_speed = DEFAULT_CPU_SPEED > + .current_speed = DEFAULT_CPU_SPEED, > + .processor_id = 0, > }; > > static struct { > @@ -327,6 +329,10 @@ static const QemuOptDesc qemu_smbios_type4_opts[] = { > .name = "part", > .type = QEMU_OPT_STRING, > .help = "part number", > + }, { > + .name = "processor-id", > + .type = QEMU_OPT_NUMBER, > + .help = "processor id", > }, > { /* end of list */ } > }; > @@ -669,8 +675,13 @@ static void smbios_build_type_4_table(MachineState *ms, unsigned instance) > t->processor_type = 0x03; /* CPU */ > t->processor_family = 0x01; /* Other */ > SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); > - t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); > - t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); > + if (type4.processor_id == 0) { > + t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); > + t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); > + } else { > + t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); > + t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); > + } > SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); > t->voltage = 0; > t->external_clock = cpu_to_le16(0); /* Unknown */ > @@ -1292,6 +1303,8 @@ void smbios_entry_add(QemuOpts *opts, Error **errp) > save_opt(&type4.serial, opts, "serial"); > save_opt(&type4.asset, opts, "asset"); > save_opt(&type4.part, opts, "part"); > + /* If the value is 0, it will take the value from the CPU model. */ > + type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); > type4.max_speed = qemu_opt_get_number(opts, "max-speed", > DEFAULT_CPU_SPEED); > type4.current_speed = qemu_opt_get_number(opts, "current-speed", > diff --git a/qemu-options.hx b/qemu-options.hx > index ec90505d84..6256417935 100644 > --- a/qemu-options.hx > +++ b/qemu-options.hx > @@ -2527,6 +2527,7 @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios, > " specify SMBIOS type 3 fields\n" > "-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n" > " [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n" > + " [,processor-id=%d]\n" > " specify SMBIOS type 4 fields\n" > "-smbios type=11[,value=str][,path=filename]\n" > " specify SMBIOS type 11 fields\n" > @@ -2552,7 +2553,7 @@ SRST > ``-smbios type=3[,manufacturer=str][,version=str][,serial=str][,asset=str][,sku=str]`` > Specify SMBIOS type 3 fields > > -``-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str][,asset=str][,part=str]`` > +``-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str][,asset=str][,part=str][,processor-id=%d]`` > Specify SMBIOS type 4 fields > > ``-smbios type=11[,value=str][,path=filename]``