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From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: luc@lmichel.fr, sai.pavan.boddu@xilinx.com,
	frasse.iglesias@gmail.com, alistair@alistair23.me,
	richard.henderson@linaro.org, qemu-devel@nongnu.org,
	francisco.iglesias@xilinx.com, frederic.konrad@adacore.com,
	qemu-arm@nongnu.org,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Subject: Re: [PATCH v1 1/6] hw/arm/xlnx-zynqmp: Add unimplemented SERDES area
Date: Mon, 31 Jan 2022 18:30:08 +0100	[thread overview]
Message-ID: <20220131173008.GF8684@toto> (raw)
In-Reply-To: <CAFEAcA-UZp943LVdq5VMn9mvDxzieWMFn_3+B8F38g5x_nsKbw@mail.gmail.com>

On Mon, Jan 31, 2022 at 03:32:25PM +0000, Peter Maydell wrote:
> On Sun, 30 Jan 2022 at 23:12, Edgar E. Iglesias
> <edgar.iglesias@gmail.com> wrote:
> >
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Add unimplemented SERDES area.
> 
> What's a SERDES ? A brief description might be helpful in
> the commit message or a comment.

These are config registers for the SER/DESerializers (for high-speed IO).
This patch was not strictly needed to pass the test-case but it came up I'm guessing due to some SW dependency in the test-case itself...

I'll add a comment and mention it in the commit message.

Thanks,
Edgar


  reply	other threads:[~2022-01-31 17:41 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-30 23:12 [PATCH v1 0/6] hw/arm: zynqmp: Add CRF and APU control to support PSCI Edgar E. Iglesias
2022-01-30 23:12 ` [PATCH v1 1/6] hw/arm/xlnx-zynqmp: Add unimplemented SERDES area Edgar E. Iglesias
2022-01-30 23:37   ` Philippe Mathieu-Daudé via
2022-01-31 15:21   ` Francisco Iglesias
2022-01-31 15:32   ` Peter Maydell
2022-01-31 17:30     ` Edgar E. Iglesias [this message]
2022-01-30 23:12 ` [PATCH v1 2/6] target/arm: Make rvbar settable after realize Edgar E. Iglesias
2022-02-03 20:21   ` Luc Michel
2022-01-30 23:12 ` [PATCH v1 3/6] hw/misc: Add a model of the Xilinx ZynqMP CRF Edgar E. Iglesias
2022-01-30 23:32   ` Philippe Mathieu-Daudé via
2022-01-31 15:35   ` Francisco Iglesias
2022-01-31 17:27     ` Edgar E. Iglesias
2022-01-31 17:51       ` Edgar E. Iglesias
2022-01-30 23:12 ` [PATCH v1 4/6] hw/arm/xlnx-zynqmp: Connect the " Edgar E. Iglesias
2022-01-30 23:33   ` Philippe Mathieu-Daudé via
2022-01-31 15:37   ` Francisco Iglesias
2022-02-03 20:23   ` Luc Michel
2022-01-30 23:12 ` [PATCH v1 5/6] hw/misc: Add a model of the Xilinx ZynqMP APU Control Edgar E. Iglesias
2022-01-30 23:35   ` Philippe Mathieu-Daudé via
2022-01-31 12:17     ` Edgar E. Iglesias
2022-01-31 23:21       ` Philippe Mathieu-Daudé via
2022-01-31 15:46   ` Francisco Iglesias
2022-01-30 23:12 ` [PATCH v1 6/6] hw/arm/xlnx-zynqmp: Connect the " Edgar E. Iglesias
2022-01-30 23:37   ` Philippe Mathieu-Daudé via
2022-01-31 15:48   ` Francisco Iglesias
2022-02-03 20:26   ` Luc Michel

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