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Tsirkin" To: Alex Williamson Subject: Re: [PATCH v5 03/18] pci: isolated address space for PCI bus Message-ID: <20220202115156-mutt-send-email-mst@kernel.org> References: <20220127142253.21ab0025.alex.williamson@redhat.com> <20220131091623.6739464e.alex.williamson@redhat.com> <20220201082437.7dd940eb.alex.williamson@redhat.com> <9BD98DD7-CC28-49E1-8150-BDECF0324FFA@oracle.com> <20220201154736.576e2a7e.alex.williamson@redhat.com> <20220202050526-mutt-send-email-mst@kernel.org> <20220202084933.6a7dc35f.alex.williamson@redhat.com> MIME-Version: 1.0 In-Reply-To: <20220202084933.6a7dc35f.alex.williamson@redhat.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.086, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "eduardo@habkost.net" , Peter Maydell , Jag Raman , Beraldo Leal , "john.levon@nutanix.com" , John Johnson , "quintela@redhat.com" , qemu-devel , Elena Ufimtseva , "armbru@redhat.com" , "thanos.makatos@nutanix.com" , =?iso-8859-1?Q?Marc-Andr=E9?= Lureau , Stefan Hajnoczi , Paolo Bonzini , Daniel =?iso-8859-1?Q?P=2E_Berrang=E9?= , Eric Blake , "Dr. David Alan Gilbert" , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Feb 02, 2022 at 08:49:33AM -0700, Alex Williamson wrote: > > Alex, what did you refer to? > > My evidence is largely by omission, but that might be that in practice > it's not used rather than explicitly forbidden. I note that the bus > master enable bit specifies: > > Bus Master Enable - Controls the ability of a Function to issue > Memory and I/O Read/Write Requests, and the ability of > a Port to forward Memory and I/O Read/Write Requests in > the Upstream direction. > > That would suggest it's possible, but for PCI device assignment, I'm > not aware of any means through which we could support this. There is > no support in the IOMMU core for mapping I/O port space, nor could we > trap such device initiated transactions to emulate them. I can't spot > any mention of I/O port space in the VT-d spec, however the AMD-Vi spec > does include a field in the device table: > > controlIoCtl: port I/O control. Specifies whether > device-initiated port I/O space transactions are blocked, > forwarded, or translated. > > 00b=Device-initiated port I/O is not allowed. The IOMMU target > aborts the transaction if a port I/O space transaction is > received. Translation requests are target aborted. > > 01b=Device-initiated port I/O space transactions are allowed. > The IOMMU must pass port I/O accesses untranslated. Translation > requests are target aborted. > > 10b=Transactions in the port I/O space address range are > translated by the IOMMU page tables as memory transactions. > > 11b=Reserved. > > I don't see this field among the macros used by the Linux driver in > configuring these device entries, so I assume it's left to the default > value, ie. zero, blocking device initiated I/O port transactions. > > So yes, I suppose device initiated I/O port transactions are possible, > but we have no support or reason to support them, so I'm going to go > ahead and continue believing any I/O port address space from the device > perspective is largely irrelevant ;) Thanks, > > Alex Right, it would seem devices can initiate I/O space transactions but IOMMUs don't support virtualizing them and so neither does VFIO. -- MST