From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, richard.henderson@linaro.org,
	f4bug@amsat.org, tsimpson@quicinc.com, mlambert@quicinc.com
Subject: [PATCH 4/8] Hexagon (target/hexagon) properly handle SNaN in dfmin/dfmax/sfmin/sfmax
Date: Sun,  6 Feb 2022 15:50:26 -0800	[thread overview]
Message-ID: <20220206235030.31493-5-tsimpson@quicinc.com> (raw)
In-Reply-To: <20220206235030.31493-1-tsimpson@quicinc.com>
The float??_minnum implementation differs from Hexagon for SNaN,
it returns NaN, but Hexagon returns the other input.  So, we add
checks for NaN before calling it.
test cases added in a subsequent patch to more extensively test USR bits
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/op_helper.c | 54 +++++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 75dc0f23f0..7f40e09486 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -947,7 +947,17 @@ float32 HELPER(sfmax)(CPUHexagonState *env, float32 RsV, float32 RtV)
 {
     float32 RdV;
     arch_fpop_start(env);
-    RdV = float32_maxnum(RsV, RtV, &env->fp_status);
+    if (float32_is_signaling_nan(RsV, &env->fp_status) &&
+        !float32_is_any_nan(RtV)) {
+        RdV = RtV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float32_is_any_nan(RsV) &&
+               float32_is_signaling_nan(RtV, &env->fp_status)) {
+        RdV = RsV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RdV = float32_maxnum(RsV, RtV, &env->fp_status);
+    }
     arch_fpop_end(env);
     return RdV;
 }
@@ -956,7 +966,17 @@ float32 HELPER(sfmin)(CPUHexagonState *env, float32 RsV, float32 RtV)
 {
     float32 RdV;
     arch_fpop_start(env);
-    RdV = float32_minnum(RsV, RtV, &env->fp_status);
+    if (float32_is_signaling_nan(RsV, &env->fp_status) &&
+        !float32_is_any_nan(RtV)) {
+        RdV = RtV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float32_is_any_nan(RsV) &&
+               float32_is_signaling_nan(RtV, &env->fp_status)) {
+        RdV = RsV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RdV = float32_minnum(RsV, RtV, &env->fp_status);
+    }
     arch_fpop_end(env);
     return RdV;
 }
@@ -1040,9 +1060,20 @@ float64 HELPER(dfmax)(CPUHexagonState *env, float64 RssV, float64 RttV)
 {
     float64 RddV;
     arch_fpop_start(env);
-    RddV = float64_maxnum(RssV, RttV, &env->fp_status);
-    if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
+    if (float64_is_signaling_nan(RssV, &env->fp_status) &&
+        !float64_is_any_nan(RttV)) {
+        RddV = RttV;
         float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float64_is_any_nan(RssV) &&
+               float64_is_signaling_nan(RttV, &env->fp_status)) {
+        RddV = RssV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RddV = float64_maxnum(RssV, RttV, &env->fp_status);
+        if (float64_is_quiet_nan(RssV, &env->fp_status) ||
+            float64_is_quiet_nan(RttV, &env->fp_status)) {
+            float_raise(float_flag_invalid, &env->fp_status);
+        }
     }
     arch_fpop_end(env);
     return RddV;
@@ -1052,9 +1083,20 @@ float64 HELPER(dfmin)(CPUHexagonState *env, float64 RssV, float64 RttV)
 {
     float64 RddV;
     arch_fpop_start(env);
-    RddV = float64_minnum(RssV, RttV, &env->fp_status);
-    if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
+    if (float64_is_signaling_nan(RssV, &env->fp_status) &&
+        !float64_is_any_nan(RttV)) {
+        RddV = RttV;
         float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float64_is_any_nan(RssV) &&
+               float64_is_signaling_nan(RttV, &env->fp_status)) {
+        RddV = RssV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RddV = float64_minnum(RssV, RttV, &env->fp_status);
+        if (float64_is_quiet_nan(RssV, &env->fp_status) ||
+            float64_is_quiet_nan(RttV, &env->fp_status)) {
+            float_raise(float_flag_invalid, &env->fp_status);
+        }
     }
     arch_fpop_end(env);
     return RddV;
-- 
2.17.1
next prev parent reply	other threads:[~2022-02-07  0:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-06 23:50 [PATCH 0/8] Hexagon bug fixes and additional tests Taylor Simpson
2022-02-06 23:50 ` [PATCH 1/8] Hexagon (target/hexagon) fix bug in circular addressing Taylor Simpson
2022-02-06 23:50 ` [PATCH 2/8] Hexagon HVX (target/hexagon)) fix bug in HVX saturate instructions Taylor Simpson
2022-02-06 23:50 ` [PATCH 3/8] Hexagon (target/hexagon) properly set FPINVF bit in sfcmp.uo and dfcmp.uo Taylor Simpson
2022-02-06 23:50 ` Taylor Simpson [this message]
2022-02-06 23:50 ` [PATCH 5/8] Hexagon (target/hexagon) properly handle denorm in arch_sf_recip_common Taylor Simpson
2022-02-06 23:50 ` [PATCH 6/8] Hexagon (tests/tcg/hexagon) test instructions that might set bits in USR Taylor Simpson
2022-02-06 23:50 ` [PATCH 7/8] Hexagon (tests/tcg/hexagon) add floating point instructions to usr.c Taylor Simpson
2022-02-06 23:50 ` [PATCH 8/8] Hexagon (tests/tcg/hexagon) update overflow test Taylor Simpson
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