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Mon, 7 Feb 2022 18:30:43 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4B43BBE05A; Mon, 7 Feb 2022 18:30:42 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.163.16.219]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Mon, 7 Feb 2022 18:30:42 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH 0/4] target/ppc: powerpc_excp improvements (9/9) Date: Mon, 7 Feb 2022 15:30:32 -0300 Message-Id: <20220207183036.1507882-1-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: EzyY1fqFmxRAhFVJF4WimRPynfzZ8ghe X-Proofpoint-ORIG-GUID: isjyjXIJcpY61gEQlEbnpTOMrKfAsQbE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-07_06,2022-02-07_02,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 spamscore=0 suspectscore=0 malwarescore=0 mlxscore=0 mlxlogscore=934 impostorscore=0 bulkscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202070111 Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is the last part of this series of changes to the exceptions code. First two patches remove the powerpc_excp_legacy function which is not needed anymore and move some of the common code from the individual powerpc_excp_* functions into powerpc_excp. Third patch makes the sanity check against msr_mask generic to check all MSR bits. Last patch removes excp_model from the AIL code for BookS. We now have only two instances left of excp_model being used as an identifier for specific CPUs. == Next steps == I'll work on the next steps which include some cleanups to cpu_init and hopefully moving into separate files for each CPU family. I'm also thinking about some changes to the POWERPC_FAMILY macro to remove the _FAMILY part, since this code has been used for a long time to create single CPUs instead of a whole family. I think the separation we have now with the exception models better represents the concept of family. So I would rather call the macro POWERPC_CPU and add (if needed) a new field 'family' to the class. With that and having one family per file, we would be able to remove the excp_model enum altogether by adding a pointer to powerpc_excp like we have for init_proc. I'll put all of that in an RFC so we can discuss. Thanks Fabiano Rosas (4): target/ppc: Remove powerpc_excp_legacy target/ppc: powerpc_excp: Move common code to the caller function target/ppc: Assert if MSR bits differ from msr_mask during exceptions target/ppc: books: Remove excp_model argument from ppc_excp_apply_ail target/ppc/excp_helper.c | 623 ++------------------------------------- 1 file changed, 31 insertions(+), 592 deletions(-) -- 2.34.1