From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PULL 26/34] tcg/sparc: Use tcg_out_movi_imm13 in tcg_out_addsub2_i64
Date: Fri, 11 Feb 2022 12:30:51 +1100 [thread overview]
Message-ID: <20220211013059.17994-27-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220211013059.17994-1-richard.henderson@linaro.org>
When BH is constant, it is constrained to 11 bits for use in MOVCC.
For the cases in which we must load the constant BH into a register,
we do not need the full logic of tcg_out_movi; we can use the simpler
function for emitting a 13 bit constant.
This eliminates the only case in which TCG_REG_T2 was passed to
tcg_out_movi, which will shortly become invalid.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/sparc/tcg-target.c.inc | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
index 0c062c60eb..8d5992ef29 100644
--- a/tcg/sparc/tcg-target.c.inc
+++ b/tcg/sparc/tcg-target.c.inc
@@ -795,7 +795,7 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh,
if (use_vis3_instructions && !is_sub) {
/* Note that ADDXC doesn't accept immediates. */
if (bhconst && bh != 0) {
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh);
+ tcg_out_movi_imm13(s, TCG_REG_T2, bh);
bh = TCG_REG_T2;
}
tcg_out_arith(s, rh, ah, bh, ARITH_ADDXC);
@@ -811,9 +811,13 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh,
tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, rh, ah, 0);
}
} else {
- /* Otherwise adjust BH as if there is carry into T2 ... */
+ /*
+ * Otherwise adjust BH as if there is carry into T2.
+ * Note that constant BH is constrained to 11 bits for the MOVCC,
+ * so the adjustment fits 12 bits.
+ */
if (bhconst) {
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh + (is_sub ? -1 : 1));
+ tcg_out_movi_imm13(s, TCG_REG_T2, bh + (is_sub ? -1 : 1));
} else {
tcg_out_arithi(s, TCG_REG_T2, bh, 1,
is_sub ? ARITH_SUB : ARITH_ADD);
--
2.25.1
next prev parent reply other threads:[~2022-02-11 2:11 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-11 1:30 [PULL 00/34] tcg patch queue Richard Henderson
2022-02-11 1:30 ` [PULL 01/34] common-user/host/sparc64: Fix safe_syscall_base Richard Henderson
2022-02-11 1:30 ` [PULL 02/34] linux-user: Introduce host_signal_mask Richard Henderson
2022-02-11 1:30 ` [PULL 03/34] linux-user: Introduce host_sigcontext Richard Henderson
2022-02-11 1:30 ` [PULL 04/34] linux-user: Move sparc/host-signal.h to sparc64/host-signal.h Richard Henderson
2022-02-11 1:30 ` [PULL 05/34] linux-user/include/host/sparc64: Fix host_sigcontext Richard Henderson
2022-02-11 1:30 ` [PULL 06/34] accel/tcg: Optimize jump cache flush during tlb range flush Richard Henderson
2022-02-11 1:30 ` [PULL 07/34] softmmu/cpus: Check if the cpu work list is empty atomically Richard Henderson
2022-02-11 1:30 ` [PULL 08/34] replay: use CF_NOIRQ for special exception-replaying TB Richard Henderson
2022-02-11 1:30 ` [PULL 09/34] tcg/loongarch64: Fix fallout from recent MO_Q renaming Richard Henderson
2022-02-11 1:30 ` [PULL 10/34] tcg/i386: Support raising sigbus for user-only Richard Henderson
2022-02-11 1:30 ` [PULL 11/34] tcg/aarch64: " Richard Henderson
2022-02-11 1:30 ` [PULL 12/34] tcg/ppc: " Richard Henderson
2022-02-11 1:30 ` [PULL 13/34] tcg/riscv: " Richard Henderson
2022-02-11 1:30 ` [PULL 14/34] tcg/s390x: " Richard Henderson
2022-02-11 1:30 ` [PULL 15/34] tcg/tci: " Richard Henderson
2022-02-11 1:30 ` [PULL 16/34] tcg/loongarch64: " Richard Henderson
2022-02-11 1:30 ` [PULL 17/34] tcg/arm: Drop support for armv4 and armv5 hosts Richard Henderson
2022-02-11 1:30 ` [PULL 18/34] tcg/arm: Remove use_armv5t_instructions Richard Henderson
2022-02-11 1:30 ` [PULL 19/34] tcg/arm: Remove use_armv6_instructions Richard Henderson
2022-02-11 1:30 ` [PULL 20/34] tcg/arm: Check alignment for ldrd and strd Richard Henderson
2022-02-11 1:30 ` [PULL 21/34] tcg/arm: Support unaligned access for softmmu Richard Henderson
2022-02-11 1:30 ` [PULL 22/34] tcg/arm: Reserve a register for guest_base Richard Henderson
2022-02-11 1:30 ` [PULL 23/34] tcg/arm: Support raising sigbus for user-only Richard Henderson
2022-02-11 1:30 ` [PULL 24/34] tcg/mips: Support unaligned access " Richard Henderson
2022-02-11 1:30 ` [PULL 25/34] tcg/mips: Support unaligned access for softmmu Richard Henderson
2022-02-11 1:30 ` Richard Henderson [this message]
2022-02-11 1:30 ` [PULL 27/34] tcg/sparc: Split out tcg_out_movi_imm32 Richard Henderson
2022-02-11 1:30 ` [PULL 28/34] tcg/sparc: Add scratch argument to tcg_out_movi_int Richard Henderson
2022-02-11 1:30 ` [PULL 29/34] tcg/sparc: Improve code gen for shifted 32-bit constants Richard Henderson
2022-02-11 1:30 ` [PULL 30/34] tcg/sparc: Convert patch_reloc to return bool Richard Henderson
2022-02-11 1:30 ` [PULL 31/34] tcg/sparc: Use the constant pool for 64-bit constants Richard Henderson
2022-02-11 1:30 ` [PULL 32/34] tcg/sparc: Add tcg_out_jmpl_const for better tail calls Richard Henderson
2022-02-11 1:30 ` [PULL 33/34] tcg/sparc: Support unaligned access for user-only Richard Henderson
2022-02-11 1:30 ` [PULL 34/34] tests/tcg/multiarch: Add sigbus.c Richard Henderson
2022-02-14 19:53 ` [PULL 00/34] tcg patch queue Peter Maydell
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