From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH] target/ppc: raise HV interrupts for partition table entry problems
Date: Mon, 14 Feb 2022 22:31:01 +1000 [thread overview]
Message-ID: <20220214123101.1546351-1-npiggin@gmail.com> (raw)
Invalid or missing partition table entry exceptions should cause HV
interrupts. HDSISR is set to bad MMU config, which is consistent with
the ISA and experimentally matches what POWER9 generates.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/mmu-radix64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 040c055bff..54fb3ce98d 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -560,13 +560,13 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr eaddr,
} else {
if (!ppc64_v3_get_pate(cpu, lpid, &pate)) {
if (guest_visible) {
- ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE);
+ ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, DSISR_R_BADCONFIG);
}
return false;
}
if (!validate_pate(cpu, lpid, &pate)) {
if (guest_visible) {
- ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_R_BADCONFIG);
+ ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, DSISR_R_BADCONFIG);
}
return false;
}
--
2.23.0
next reply other threads:[~2022-02-14 13:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-14 12:31 Nicholas Piggin [this message]
2022-02-14 13:18 ` [PATCH] target/ppc: raise HV interrupts for partition table entry problems Daniel Henrique Barboza
2022-02-14 13:21 ` Fabiano Rosas
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