From: Igor Mammedov <imammedo@redhat.com>
To: Joao Martins <joao.m.martins@oracle.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, Daniel Jordan <daniel.m.jordan@oracle.com>,
David Edmondson <david.edmondson@oracle.com>,
Alex Williamson <alex.williamson@redhat.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Ani Sinha <ani@anisinha.ca>, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH RFCv2 1/4] hw/i386: add 4g boundary start to X86MachineState
Date: Mon, 14 Feb 2022 14:19:31 +0100 [thread overview]
Message-ID: <20220214141931.61b87d43@redhat.com> (raw)
In-Reply-To: <20220207202422.31582-2-joao.m.martins@oracle.com>
On Mon, 7 Feb 2022 20:24:19 +0000
Joao Martins <joao.m.martins@oracle.com> wrote:
> Rather than hardcoding the 4G boundary everywhere, introduce a
> X86MachineState property @above_4g_mem_start and use it
> accordingly.
>
> This is in preparation for relocating ram-above-4g to be
> dynamically start at 1T on AMD platforms.
>
> Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
> ---
> hw/i386/acpi-build.c | 2 +-
> hw/i386/pc.c | 9 +++++----
> hw/i386/sgx.c | 2 +-
> hw/i386/x86.c | 1 +
> include/hw/i386/x86.h | 3 +++
> 5 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index ebd47aa26fd8..4bf54ccdab91 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -2063,7 +2063,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
> build_srat_memory(table_data, mem_base, mem_len, i - 1,
> MEM_AFFINITY_ENABLED);
> }
> - mem_base = 1ULL << 32;
> + mem_base = x86ms->above_4g_mem_start;
> mem_len = next_base - x86ms->below_4g_mem_size;
> next_base = mem_base + mem_len;
> }
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index c8696ac01e85..7de0e87f4a3f 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -837,9 +837,10 @@ void pc_memory_init(PCMachineState *pcms,
> machine->ram,
> x86ms->below_4g_mem_size,
> x86ms->above_4g_mem_size);
> - memory_region_add_subregion(system_memory, 0x100000000ULL,
> + memory_region_add_subregion(system_memory, x86ms->above_4g_mem_start,
> ram_above_4g);
> - e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
> + e820_add_entry(x86ms->above_4g_mem_start, x86ms->above_4g_mem_size,
> + E820_RAM);
> }
>
> if (pcms->sgx_epc.size != 0) {
> @@ -880,7 +881,7 @@ void pc_memory_init(PCMachineState *pcms,
> machine->device_memory->base = sgx_epc_above_4g_end(&pcms->sgx_epc);
> } else {
> machine->device_memory->base =
> - 0x100000000ULL + x86ms->above_4g_mem_size;
> + x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
> }
>
> machine->device_memory->base =
> @@ -972,7 +973,7 @@ uint64_t pc_pci_hole64_start(void)
> } else if (pcms->sgx_epc.size != 0) {
> hole64_start = sgx_epc_above_4g_end(&pcms->sgx_epc);
> } else {
> - hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size;
> + hole64_start = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
> }
>
> return ROUND_UP(hole64_start, 1 * GiB);
> diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
> index a2b318dd9387..164ee1ddb8de 100644
> --- a/hw/i386/sgx.c
> +++ b/hw/i386/sgx.c
> @@ -295,7 +295,7 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms)
> return;
> }
>
> - sgx_epc->base = 0x100000000ULL + x86ms->above_4g_mem_size;
> + sgx_epc->base = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
>
> memory_region_init(&sgx_epc->mr, OBJECT(pcms), "sgx-epc", UINT64_MAX);
> memory_region_add_subregion(get_system_memory(), sgx_epc->base,
> diff --git a/hw/i386/x86.c b/hw/i386/x86.c
> index b84840a1bb99..912e96718ee8 100644
> --- a/hw/i386/x86.c
> +++ b/hw/i386/x86.c
> @@ -1319,6 +1319,7 @@ static void x86_machine_initfn(Object *obj)
> x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
> x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
> x86ms->bus_lock_ratelimit = 0;
> + x86ms->above_4g_mem_start = 0x100000000ULL;
> }
>
> static void x86_machine_class_init(ObjectClass *oc, void *data)
> diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
> index a145a303703f..2de7ec046b75 100644
> --- a/include/hw/i386/x86.h
> +++ b/include/hw/i386/x86.h
> @@ -58,6 +58,9 @@ struct X86MachineState {
> /* RAM information (sizes, addresses, configuration): */
> ram_addr_t below_4g_mem_size, above_4g_mem_size;
>
> + /* RAM information when there's a hole in 1Tb */
s/^^^/GPA of the part of initial RAM above 4G/
or something like that, it doesn't have anything to do with hole at 1Tb
on some hosts.
> + ram_addr_t above_4g_mem_start;
> +
> /* CPU and apic information: */
> bool apic_xrupt_override;
> unsigned pci_irq_mask;
next prev parent reply other threads:[~2022-02-14 14:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 20:24 [PATCH RFCv2 0/4] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 1/4] hw/i386: add 4g boundary start to X86MachineState Joao Martins
2022-02-14 13:19 ` Igor Mammedov [this message]
2022-02-14 13:21 ` Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable Joao Martins
2022-02-14 14:53 ` Igor Mammedov
2022-02-14 15:05 ` Joao Martins
2022-02-14 15:31 ` Igor Mammedov
2022-02-15 9:53 ` Gerd Hoffmann
2022-02-15 19:37 ` Joao Martins
2022-02-16 8:19 ` Gerd Hoffmann
2022-02-16 11:54 ` Joao Martins
2022-02-16 12:32 ` Gerd Hoffmann
2022-02-16 9:51 ` Daniel P. Berrangé
2022-02-21 13:15 ` Dr. David Alan Gilbert
2022-02-22 8:46 ` Igor Mammedov
2022-02-22 9:30 ` Dr. David Alan Gilbert
2022-02-22 9:42 ` Gerd Hoffmann
2022-02-23 8:43 ` Igor Mammedov
2022-02-23 9:16 ` Dr. David Alan Gilbert
2022-02-23 9:31 ` Igor Mammedov
2022-02-18 17:12 ` Joao Martins
2022-02-21 6:58 ` Igor Mammedov
2022-02-21 15:28 ` Joao Martins
2022-02-22 11:00 ` Joao Martins
2022-02-23 8:38 ` Igor Mammedov
2022-02-07 20:24 ` [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low Joao Martins
2022-02-14 13:15 ` David Edmondson
2022-02-14 13:18 ` Joao Martins
2022-02-14 15:03 ` Igor Mammedov
2022-02-14 15:18 ` Joao Martins
2022-02-14 15:41 ` Igor Mammedov
2022-02-14 15:48 ` Joao Martins
2022-02-23 17:18 ` Joao Martins
2022-02-24 9:01 ` Igor Mammedov
2022-02-24 9:27 ` Joao Martins
2022-02-07 20:24 ` [PATCH RFCv2 4/4] i386/pc: Restrict AMD-only enforcing of valid IOVAs to new machine type Joao Martins
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