From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, ehabkost@redhat.com, mtosatti@redhat.com,
seanjc@google.com, richard.henderson@linaro.org,
like.xu.linux@gmail.com, wei.w.wang@intel.com,
qemu-devel@nongnu.org, kvm@vger.kernel.org
Cc: Yang Weijiang <weijiang.yang@intel.com>
Subject: [PATCH 7/8] target/i386: Enable Arch LBR migration states in vmstate
Date: Tue, 15 Feb 2022 14:52:57 -0500 [thread overview]
Message-ID: <20220215195258.29149-8-weijiang.yang@intel.com> (raw)
In-Reply-To: <20220215195258.29149-1-weijiang.yang@intel.com>
The Arch LBR record MSRs and control MSRs will be migrated
to destination guest if the vcpus were running with Arch
LBR active.
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
target/i386/machine.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 1f9d0c46f1..08db7d3629 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -136,6 +136,22 @@ static const VMStateDescription vmstate_mtrr_var = {
#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
+static const VMStateDescription vmstate_lbr_records_var = {
+ .name = "lbr_records_var",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(from, LBR_ENTRY),
+ VMSTATE_UINT64(to, LBR_ENTRY),
+ VMSTATE_UINT64(info, LBR_ENTRY),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+#define VMSTATE_LBR_VARS(_field, _state, _n, _v) \
+ VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_lbr_records_var, \
+ LBR_ENTRY)
+
typedef struct x86_FPReg_tmp {
FPReg *parent;
uint64_t tmp_mant;
@@ -1523,6 +1539,27 @@ static const VMStateDescription vmstate_amx_xtile = {
}
};
+static bool arch_lbr_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return !!(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR);
+}
+
+static const VMStateDescription vmstate_arch_lbr = {
+ .name = "cpu/arch_lbr",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = arch_lbr_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(env.msr_lbr_ctl, X86CPU),
+ VMSTATE_UINT64(env.msr_lbr_depth, X86CPU),
+ VMSTATE_LBR_VARS(env.lbr_records, X86CPU, ARCH_LBR_NR_ENTRIES, 1),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
const VMStateDescription vmstate_x86_cpu = {
.name = "cpu",
.version_id = 12,
@@ -1664,6 +1701,7 @@ const VMStateDescription vmstate_x86_cpu = {
&vmstate_pdptrs,
&vmstate_msr_xfd,
&vmstate_amx_xtile,
+ &vmstate_arch_lbr,
NULL
}
};
--
2.27.0
next prev parent reply other threads:[~2022-02-16 9:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-15 19:52 [PATCH 0/8] Enable Architectural LBR for guest Yang Weijiang
2022-02-15 19:52 ` [PATCH 1/8] qdev-properties: Add a new macro with bitmask check for uint64_t property Yang Weijiang
2022-02-15 19:52 ` [PATCH 2/8] target/i386: Add lbr-fmt vPMU option to support guest LBR Yang Weijiang
2022-02-15 19:52 ` [PATCH 3/8] target/i386: Add kvm_get_one_msr helper Yang Weijiang
2022-02-15 19:52 ` [PATCH 4/8] target/i386: Enable support for XSAVES based features Yang Weijiang
2022-02-15 19:52 ` [PATCH 5/8] target/i386: Add XSAVES support for Arch LBR Yang Weijiang
2022-02-15 19:52 ` [PATCH 6/8] target/i386: Add MSR access interface " Yang Weijiang
2022-02-15 19:52 ` Yang Weijiang [this message]
2022-02-15 19:52 ` [PATCH 8/8] target/i386: Support Arch LBR in CPUID enumeration Yang Weijiang
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