From: Fabiano Rosas <farosas@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org,
david@gibson.dropbear.id.au
Subject: [PATCH 24/27] target/ppc: cpu_init: Expose some SPR registration helpers
Date: Tue, 15 Feb 2022 18:41:45 -0300 [thread overview]
Message-ID: <20220215214148.1848266-25-farosas@linux.ibm.com> (raw)
In-Reply-To: <20220215214148.1848266-1-farosas@linux.ibm.com>
The following patches will move CPU-specific code into separate files,
so expose the most used SPR registration functions:
register_sdr1_sprs | 22 callers
register_low_BATs | 20 callers
register_non_embedded_sprs | 19 callers
register_high_BATs | 10 callers
register_thrm_sprs | 8 callers
register_usprgh_sprs | 6 callers
register_soft_tlb_sprs | only 3 callers, but it helps to
keep the soft TLB code consistent.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
target/ppc/cpu_init.c | 14 +++++++-------
target/ppc/spr_tcg.h | 8 ++++++++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 3585dc69bc..74e26f60dd 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -241,7 +241,7 @@ static void register_generic_sprs(PowerPCCPU *cpu)
0x00000000);
}
-static void register_non_embedded_sprs(CPUPPCState *env)
+void register_non_embedded_sprs(CPUPPCState *env)
{
/* Exception processing */
spr_register_kvm(env, SPR_DSISR, "DSISR",
@@ -260,7 +260,7 @@ static void register_non_embedded_sprs(CPUPPCState *env)
}
/* Storage Description Register 1 */
-static void register_sdr1_sprs(CPUPPCState *env)
+void register_sdr1_sprs(CPUPPCState *env)
{
#ifndef CONFIG_USER_ONLY
if (env->has_hv_mode) {
@@ -283,7 +283,7 @@ static void register_sdr1_sprs(CPUPPCState *env)
}
/* BATs 0-3 */
-static void register_low_BATs(CPUPPCState *env)
+void register_low_BATs(CPUPPCState *env)
{
#if !defined(CONFIG_USER_ONLY)
spr_register(env, SPR_IBAT0U, "IBAT0U",
@@ -355,7 +355,7 @@ static void register_low_BATs(CPUPPCState *env)
}
/* BATs 4-7 */
-static void register_high_BATs(CPUPPCState *env)
+void register_high_BATs(CPUPPCState *env)
{
#if !defined(CONFIG_USER_ONLY)
spr_register(env, SPR_IBAT4U, "IBAT4U",
@@ -427,7 +427,7 @@ static void register_high_BATs(CPUPPCState *env)
}
/* Softare table search registers */
-static void register_soft_tlb_sprs(CPUPPCState *env, int nb_tlbs, int nb_ways)
+void register_soft_tlb_sprs(CPUPPCState *env, int nb_tlbs, int nb_ways)
{
#if !defined(CONFIG_USER_ONLY)
env->nb_tlb = nb_tlbs;
@@ -667,7 +667,7 @@ static void register_iamr_sprs(CPUPPCState *env)
}
#endif /* TARGET_PPC64 */
-static void register_thrm_sprs(CPUPPCState *env)
+void register_thrm_sprs(CPUPPCState *env)
{
/* Thermal management */
spr_register(env, SPR_THRM1, "THRM1",
@@ -1072,7 +1072,7 @@ static void register_l3_ctrl(CPUPPCState *env)
0x00000000);
}
-static void register_usprgh_sprs(CPUPPCState *env)
+void register_usprgh_sprs(CPUPPCState *env)
{
spr_register(env, SPR_USPRG4, "USPRG4",
&spr_read_ureg, SPR_NOACCESS,
diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h
index df2abacc64..a4f912faa4 100644
--- a/target/ppc/spr_tcg.h
+++ b/target/ppc/spr_tcg.h
@@ -141,4 +141,12 @@ void spr_write_hmer(DisasContext *ctx, int sprn, int gprn);
void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn);
#endif
+void register_low_BATs(CPUPPCState *env);
+void register_high_BATs(CPUPPCState *env);
+void register_sdr1_sprs(CPUPPCState *env);
+void register_thrm_sprs(CPUPPCState *env);
+void register_usprgh_sprs(CPUPPCState *env);
+void register_non_embedded_sprs(CPUPPCState *env);
+void register_soft_tlb_sprs(CPUPPCState *env, int nb_tlbs, int nb_ways);
+
#endif
--
2.34.1
next prev parent reply other threads:[~2022-02-15 22:01 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-15 21:41 [PATCH 00/27] target/ppc: SPR registration cleanups Fabiano Rosas
2022-02-15 21:41 ` [PATCH 01/27] target/ppc: cpu_init: Remove not implemented comments Fabiano Rosas
2022-02-16 2:05 ` David Gibson
2022-02-15 21:41 ` [PATCH 02/27] target/ppc: cpu_init: Remove G2LE init code Fabiano Rosas
2022-02-16 2:07 ` David Gibson
2022-02-15 21:41 ` [PATCH 03/27] target/ppc: cpu_init: Group registration of generic SPRs Fabiano Rosas
2022-02-16 2:10 ` David Gibson
2022-02-15 21:41 ` [PATCH 04/27] target/ppc: cpu_init: Move Timebase registration into the common function Fabiano Rosas
2022-02-16 2:11 ` David Gibson
2022-02-15 21:41 ` [PATCH 05/27] target/ppc: cpu_init: Avoid nested SPR register functions Fabiano Rosas
2022-02-16 2:12 ` David Gibson
2022-02-15 21:41 ` [PATCH 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs Fabiano Rosas
2022-02-16 2:13 ` David Gibson
2022-02-15 21:41 ` [PATCH 07/27] target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs Fabiano Rosas
2022-02-16 2:14 ` David Gibson
2022-02-15 21:41 ` [PATCH 08/27] target/ppc: cpu_init: Decouple G2 SPR registration from 755 Fabiano Rosas
2022-02-16 2:15 ` David Gibson
2022-02-15 21:41 ` [PATCH 09/27] target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx Fabiano Rosas
2022-02-16 2:16 ` David Gibson
2022-02-15 21:41 ` [PATCH 10/27] target/ppc: cpu_init: Deduplicate 440 SPR registration Fabiano Rosas
2022-02-16 2:18 ` David Gibson
2022-02-15 21:41 ` [PATCH 11/27] target/ppc: cpu_init: Deduplicate 603 " Fabiano Rosas
2022-02-16 2:19 ` David Gibson
2022-02-15 21:41 ` [PATCH 12/27] target/ppc: cpu_init: Deduplicate 604 " Fabiano Rosas
2022-02-16 2:19 ` David Gibson
2022-02-15 21:41 ` [PATCH 13/27] target/ppc: cpu_init: Deduplicate 7xx " Fabiano Rosas
2022-02-16 2:23 ` David Gibson
2022-02-15 21:41 ` [PATCH 14/27] target/ppc: cpu_init: Deduplicate 755 " Fabiano Rosas
2022-02-16 2:23 ` David Gibson
2022-02-15 21:41 ` [PATCH 15/27] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function Fabiano Rosas
2022-02-16 2:24 ` David Gibson
2022-02-16 2:52 ` David Gibson
2022-02-15 21:41 ` [PATCH 16/27] target/ppc: cpu_init: Move e300 SPR registration " Fabiano Rosas
2022-02-16 2:26 ` David Gibson
2022-02-15 21:41 ` [PATCH 17/27] target/ppc: cpu_init: Move 604e " Fabiano Rosas
2022-02-16 2:50 ` David Gibson
2022-02-15 21:41 ` [PATCH 18/27] target/ppc: cpu_init: Reuse init_proc_603 for the e300 Fabiano Rosas
2022-02-16 2:27 ` David Gibson
2022-02-15 21:41 ` [PATCH 19/27] target/ppc: cpu_init: Reuse init_proc_604 for the 604e Fabiano Rosas
2022-02-16 2:50 ` David Gibson
2022-02-15 21:41 ` [PATCH 20/27] target/ppc: cpu_init: Reuse init_proc_745 for the 755 Fabiano Rosas
2022-02-16 2:54 ` David Gibson
2022-02-15 21:41 ` [PATCH 21/27] target/ppc: cpu_init: Rename software TLB function Fabiano Rosas
2022-02-16 2:56 ` David Gibson
2022-02-15 21:41 ` [PATCH 22/27] target/ppc: cpu_init: Rename register_ne_601_sprs Fabiano Rosas
2022-02-16 2:59 ` David Gibson
2022-02-16 13:19 ` Fabiano Rosas
2022-02-16 23:41 ` David Gibson
2022-02-15 21:41 ` [PATCH 23/27] target/ppc: cpu_init: Remove register_usprg3_sprs Fabiano Rosas
2022-02-16 2:59 ` David Gibson
2022-02-15 21:41 ` Fabiano Rosas [this message]
2022-02-16 3:00 ` [PATCH 24/27] target/ppc: cpu_init: Expose some SPR registration helpers David Gibson
2022-02-15 21:41 ` [PATCH 25/27] target/ppc: cpu_init: Move SPR registration macros to a header Fabiano Rosas
2022-02-16 3:01 ` David Gibson
2022-02-15 21:41 ` [PATCH 26/27] target/ppc: cpu_init: Move check_pow and QOM " Fabiano Rosas
2022-02-16 3:04 ` David Gibson
2022-02-16 13:06 ` Fabiano Rosas
2022-02-16 23:32 ` David Gibson
2022-02-15 21:41 ` [PATCH 27/27] target/ppc: Move common SPR functions out of cpu_init Fabiano Rosas
2022-02-16 3:05 ` David Gibson
2022-02-16 3:06 ` [PATCH 00/27] target/ppc: SPR registration cleanups David Gibson
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