From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Bernhard Beschow" <shentey@gmail.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v3 5/7] hw/isa/piix4: Resolve global instance variable
Date: Wed, 16 Feb 2022 23:45:17 +0100 [thread overview]
Message-ID: <20220216224519.157233-6-shentey@gmail.com> (raw)
In-Reply-To: <20220216224519.157233-1-shentey@gmail.com>
Now that piix4_set_irq's opaque parameter references own PIIX4State,
piix4_dev becomes redundant.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/isa/piix4.c | 10 +++-------
include/hw/southbridge/piix.h | 2 --
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index caa2002e2c..2e9b5ccada 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -39,8 +39,6 @@
#include "sysemu/runstate.h"
#include "qom/object.h"
-PCIDevice *piix4_dev;
-
struct PIIX4State {
PCIDevice dev;
qemu_irq cpu_intr;
@@ -58,16 +56,16 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
PIIX4State *s = opaque;
- PCIBus *bus = pci_get_bus(piix4_dev);
+ PCIBus *bus = pci_get_bus(&s->dev);
/* now we change the pic irq level according to the piix irq mappings */
/* XXX: optimize */
- pic_irq = piix4_dev->config[PIIX_PIRQCA + irq_num];
+ pic_irq = s->dev.config[PIIX_PIRQCA + irq_num];
if (pic_irq < 16) {
/* The pic level is the logical OR of all the PCI irqs mapped to it. */
pic_level = 0;
for (i = 0; i < 4; i++) {
- if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) {
+ if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) {
pic_level |= pci_bus_get_irq_level(bus, i);
}
}
@@ -219,8 +217,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
return;
}
isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ);
-
- piix4_dev = dev;
}
static void piix4_init(Object *obj)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 6387f2b612..f63f83e5c6 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -70,8 +70,6 @@ typedef struct PIIXState PIIX3State;
DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE,
TYPE_PIIX3_PCI_DEVICE)
-extern PCIDevice *piix4_dev;
-
PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);
--
2.35.1
next prev parent reply other threads:[~2022-02-16 22:56 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 22:45 [PATCH v3 0/7] malta: Fix PCI IRQ levels to be preserved during migration, cleanup Bernhard Beschow
2022-02-16 22:45 ` [PATCH v3 1/7] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration Bernhard Beschow
2022-02-17 11:57 ` Peter Maydell
2022-02-16 22:45 ` [PATCH v3 2/7] malta: Move PCI interrupt handling from gt64xxx_pci to piix4 Bernhard Beschow
2022-02-16 23:15 ` Philippe Mathieu-Daudé via
2022-02-16 22:45 ` [PATCH v3 3/7] hw/isa/piix4: Resolve redundant i8259[] attribute Bernhard Beschow
2022-02-16 23:13 ` Philippe Mathieu-Daudé via
2022-02-17 6:34 ` Michael S. Tsirkin
2022-02-16 22:45 ` [PATCH v3 4/7] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() Bernhard Beschow
2022-02-17 6:34 ` Michael S. Tsirkin
2022-02-16 22:45 ` Bernhard Beschow [this message]
2022-02-17 6:34 ` [PATCH v3 5/7] hw/isa/piix4: Resolve global instance variable Michael S. Tsirkin
2022-02-16 22:45 ` [PATCH v3 6/7] hw/isa/piix4: Replace some magic IRQ constants Bernhard Beschow
2022-02-16 23:09 ` Philippe Mathieu-Daudé via
2022-02-17 6:35 ` Michael S. Tsirkin
2022-02-16 22:45 ` [PATCH v3 7/7] hw/mips/gt64xxx_pci: Resolve gt64120_register() Bernhard Beschow
2022-02-16 23:13 ` Philippe Mathieu-Daudé via
2022-02-17 2:22 ` BALATON Zoltan
2022-02-17 6:36 ` [PATCH v3 0/7] malta: Fix PCI IRQ levels to be preserved during migration, cleanup Michael S. Tsirkin
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