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Tsirkin" To: Bernhard Beschow Subject: Re: [PATCH v3 4/7] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() Message-ID: <20220217013433-mutt-send-email-mst@kernel.org> References: <20220216224519.157233-1-shentey@gmail.com> <20220216224519.157233-5-shentey@gmail.com> MIME-Version: 1.0 In-Reply-To: <20220216224519.157233-5-shentey@gmail.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.083, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?iso-8859-1?Q?Herv=E9?= Poussineau , qemu-devel@nongnu.org, Aurelien Jarno , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Feb 16, 2022 at 11:45:16PM +0100, Bernhard Beschow wrote: > Passing PIIX4State rather than just the qemu_irq allows for resolving > the global piix4_dev variable. > > Signed-off-by: Bernhard Beschow > Reviewed-by: Peter Maydell > Reviewed-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin > --- > hw/isa/piix4.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c > index 179968b18e..caa2002e2c 100644 > --- a/hw/isa/piix4.c > +++ b/hw/isa/piix4.c > @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) > static void piix4_set_irq(void *opaque, int irq_num, int level) > { > int i, pic_irq, pic_level; > - qemu_irq *pic = opaque; > + PIIX4State *s = opaque; > PCIBus *bus = pci_get_bus(piix4_dev); > > /* now we change the pic irq level according to the piix irq mappings */ > @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) > pic_level |= pci_bus_get_irq_level(bus, i); > } > } > - qemu_set_irq(pic[pic_irq], pic_level); > + qemu_set_irq(s->isa[pic_irq], pic_level); > } > } > > @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) > NULL, 0, NULL); > } > > - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); > + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); > > return dev; > } > -- > 2.35.1 > > >