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Tsirkin" To: Bernhard Beschow Subject: Re: [PATCH v3 0/7] malta: Fix PCI IRQ levels to be preserved during migration, cleanup Message-ID: <20220217013601-mutt-send-email-mst@kernel.org> References: <20220216224519.157233-1-shentey@gmail.com> MIME-Version: 1.0 In-Reply-To: <20220216224519.157233-1-shentey@gmail.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.083, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Feb 16, 2022 at 11:45:12PM +0100, Bernhard Beschow wrote: > Tested with [1]: > > qemu-system-mipsel -M malta -kernel vmlinux-3.2.0-4-4kc-malta -hda \ > debian_wheezy_mipsel_standard.qcow2 -append "root=/dev/sda1 console=tty0" > > It was possible to log in as root and `poweroff` the machine. > > Moreover, I ran: > > :$ make check > Ok: 569 > Expected Fail: 0 > Fail: 0 > Unexpected Pass: 0 > Skipped: 178 > Timeout: 0 > > [1] https://people.debian.org/~aurel32/qemu/mips/ > Who's merging this? I assume mips guys? > v3: > The migration bug now gets fixed in gt64xxx_pci before any cleanup. As > suggested by PMM the patch is based on commit e735b55a8c11. > The code movement patch now moves the already fixed code. I might be a bit > too conservative here by removing Philippe's Reviewed-By tag. > As suggested by BALATON Zoltan, the redundant i8259[] attribute is now > resolved immediately after the code movement. As a side effect, it also > removes moved code which doesn't adhere to the coding style (local loop > variable). > To address BALATON Zoltan's comment and to reduce the number of required > Reviewed-By's, only piix4_set_irq() is modified to expect own DeviceState > paremeter. Up to v2, all remaining set_irq() functions were changed this > way. > The patch resolving piix4's singleton variable got split into two patches: > One which resolves the singleton variable and one which replaces magic > constants. The split patches should be more comprehensible. > Suggested by BALATON Zoltan, I took a chance to resolve gt64120_register(), > a method akin to the legacy init functions we're trying to get rid of. > > v2: > isa/piix4: Fix PCI IRQ levels to be preserved in VMState > isa/piix4: Resolve redundant i8259[] attribute > > Bernhard Beschow (7): > hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during > migration > malta: Move PCI interrupt handling from gt64xxx_pci to piix4 > hw/isa/piix4: Resolve redundant i8259[] attribute > hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() > hw/isa/piix4: Resolve global instance variable > hw/isa/piix4: Replace some magic IRQ constants > hw/mips/gt64xxx_pci: Resolve gt64120_register() > > hw/isa/piix4.c | 54 +++++++++++++++++++++-- > hw/mips/gt64xxx_pci.c | 80 +++-------------------------------- > hw/mips/malta.c | 17 ++++---- > include/hw/mips/mips.h | 3 -- > include/hw/southbridge/piix.h | 2 - > 5 files changed, 65 insertions(+), 91 deletions(-) > > -- > 2.35.1 > > >