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From: Anup Patel <anup@brainfault.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: qemu-riscv@nongnu.org, Frank Chang <frank.chang@sifive.com>,
	Anup Patel <anup@brainfault.org>,
	qemu-devel@nongnu.org,
	Alistair Francis <alistair.francis@wdc.com>,
	Atish Patra <atishp@atishpatra.org>,
	Bin Meng <bmeng.cn@gmail.com>
Subject: [PATCH v10 4/5] docs/system: riscv: Document AIA options for virt machine
Date: Sun, 20 Feb 2022 14:25:25 +0530	[thread overview]
Message-ID: <20220220085526.808674-5-anup@brainfault.org> (raw)
In-Reply-To: <20220220085526.808674-1-anup@brainfault.org>

From: Anup Patel <anup.patel@wdc.com>

We have two new machine options "aia" and "aia-guests" available
for the RISC-V virt machine so let's document these options.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
 docs/system/riscv/virt.rst | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 08ce3c4177..1272b6659e 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -63,6 +63,22 @@ The following machine-specific options are supported:
   When this option is "on", ACLINT devices will be emulated instead of
   SiFive CLINT. When not specified, this option is assumed to be "off".
 
+- aia=[none|aplic|aplic-imsic]
+
+  This option allows selecting interrupt controller defined by the AIA
+  (advanced interrupt architecture) specification. The "aia=aplic" selects
+  APLIC (advanced platform level interrupt controller) to handle wired
+  interrupts whereas the "aia=aplic-imsic" selects APLIC and IMSIC (incoming
+  message signaled interrupt controller) to handle both wired interrupts and
+  MSIs. When not specified, this option is assumed to be "none" which selects
+  SiFive PLIC to handle wired interrupts.
+
+- aia-guests=nnn
+
+  The number of per-HART VS-level AIA IMSIC pages to be emulated for a guest
+  having AIA IMSIC (i.e. "aia=aplic-imsic" selected). When not specified,
+  the default number of per-HART VS-level AIA IMSIC pages is 0.
+
 Running Linux kernel
 --------------------
 
-- 
2.25.1



  parent reply	other threads:[~2022-02-20  9:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-20  8:55 [PATCH v10 0/5] QEMU RISC-V AIA support Anup Patel
2022-02-20  8:55 ` [PATCH v10 1/5] hw/riscv: virt: Add optional AIA APLIC support to virt machine Anup Patel
2022-02-20  8:55 ` [PATCH v10 2/5] hw/intc: Add RISC-V AIA IMSIC device emulation Anup Patel
2022-02-20  8:55 ` [PATCH v10 3/5] hw/riscv: virt: Add optional AIA IMSIC support to virt machine Anup Patel
2022-02-20  8:55 ` Anup Patel [this message]
2022-02-20  8:55 ` [PATCH v10 5/5] hw/riscv: virt: Increase maximum number of allowed CPUs Anup Patel
2022-02-21  7:11 ` [PATCH v10 0/5] QEMU RISC-V AIA support Alistair Francis

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