From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 03/26] hvf: arm: Use macros for sysreg shift/masking
Date: Mon, 21 Feb 2022 09:27:37 +0000 [thread overview]
Message-ID: <20220221092800.404870-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220221092800.404870-1-peter.maydell@linaro.org>
From: Alexander Graf <agraf@csgraf.de>
We are parsing the syndrome field for sysregs in multiple places across
the hvf code, but repeat shift/mask operations with hard coded constants
every time. This is an error prone approach and makes it harder to reason
about the correctness of these operations.
Let's introduce macros that allow us to unify the constants used as well
as create new helpers to extract fields from the sysreg value.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Cameron Esfahani <dirty@apple.com <mailto:dirty@apple.com>>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20220209124135.69183-1-agraf@csgraf.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/hvf/hvf.c | 69 ++++++++++++++++++++++++++++++--------------
1 file changed, 47 insertions(+), 22 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 0dc96560d34..808c96da8cc 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -35,9 +35,34 @@
ENCODE_AA64_CP_REG(CP_REG_ARM64_SYSREG_CP, crn, crm, op0, op1, op2)
#define PL1_WRITE_MASK 0x4
+#define SYSREG_OP0_SHIFT 20
+#define SYSREG_OP0_MASK 0x3
+#define SYSREG_OP0(sysreg) ((sysreg >> SYSREG_OP0_SHIFT) & SYSREG_OP0_MASK)
+#define SYSREG_OP1_SHIFT 14
+#define SYSREG_OP1_MASK 0x7
+#define SYSREG_OP1(sysreg) ((sysreg >> SYSREG_OP1_SHIFT) & SYSREG_OP1_MASK)
+#define SYSREG_CRN_SHIFT 10
+#define SYSREG_CRN_MASK 0xf
+#define SYSREG_CRN(sysreg) ((sysreg >> SYSREG_CRN_SHIFT) & SYSREG_CRN_MASK)
+#define SYSREG_CRM_SHIFT 1
+#define SYSREG_CRM_MASK 0xf
+#define SYSREG_CRM(sysreg) ((sysreg >> SYSREG_CRM_SHIFT) & SYSREG_CRM_MASK)
+#define SYSREG_OP2_SHIFT 17
+#define SYSREG_OP2_MASK 0x7
+#define SYSREG_OP2(sysreg) ((sysreg >> SYSREG_OP2_SHIFT) & SYSREG_OP2_MASK)
+
#define SYSREG(op0, op1, crn, crm, op2) \
- ((op0 << 20) | (op2 << 17) | (op1 << 14) | (crn << 10) | (crm << 1))
-#define SYSREG_MASK SYSREG(0x3, 0x7, 0xf, 0xf, 0x7)
+ ((op0 << SYSREG_OP0_SHIFT) | \
+ (op1 << SYSREG_OP1_SHIFT) | \
+ (crn << SYSREG_CRN_SHIFT) | \
+ (crm << SYSREG_CRM_SHIFT) | \
+ (op2 << SYSREG_OP2_SHIFT))
+#define SYSREG_MASK \
+ SYSREG(SYSREG_OP0_MASK, \
+ SYSREG_OP1_MASK, \
+ SYSREG_CRN_MASK, \
+ SYSREG_CRM_MASK, \
+ SYSREG_OP2_MASK)
#define SYSREG_OSLAR_EL1 SYSREG(2, 0, 1, 0, 4)
#define SYSREG_OSLSR_EL1 SYSREG(2, 0, 1, 1, 4)
#define SYSREG_OSDLR_EL1 SYSREG(2, 0, 1, 3, 4)
@@ -783,21 +808,21 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint32_t rt)
default:
cpu_synchronize_state(cpu);
trace_hvf_unhandled_sysreg_read(env->pc, reg,
- (reg >> 20) & 0x3,
- (reg >> 14) & 0x7,
- (reg >> 10) & 0xf,
- (reg >> 1) & 0xf,
- (reg >> 17) & 0x7);
+ SYSREG_OP0(reg),
+ SYSREG_OP1(reg),
+ SYSREG_CRN(reg),
+ SYSREG_CRM(reg),
+ SYSREG_OP2(reg));
hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized());
return 1;
}
trace_hvf_sysreg_read(reg,
- (reg >> 20) & 0x3,
- (reg >> 14) & 0x7,
- (reg >> 10) & 0xf,
- (reg >> 1) & 0xf,
- (reg >> 17) & 0x7,
+ SYSREG_OP0(reg),
+ SYSREG_OP1(reg),
+ SYSREG_CRN(reg),
+ SYSREG_CRM(reg),
+ SYSREG_OP2(reg),
val);
hvf_set_reg(cpu, rt, val);
@@ -886,11 +911,11 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
CPUARMState *env = &arm_cpu->env;
trace_hvf_sysreg_write(reg,
- (reg >> 20) & 0x3,
- (reg >> 14) & 0x7,
- (reg >> 10) & 0xf,
- (reg >> 1) & 0xf,
- (reg >> 17) & 0x7,
+ SYSREG_OP0(reg),
+ SYSREG_OP1(reg),
+ SYSREG_CRN(reg),
+ SYSREG_CRM(reg),
+ SYSREG_OP2(reg),
val);
switch (reg) {
@@ -960,11 +985,11 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
default:
cpu_synchronize_state(cpu);
trace_hvf_unhandled_sysreg_write(env->pc, reg,
- (reg >> 20) & 0x3,
- (reg >> 14) & 0x7,
- (reg >> 10) & 0xf,
- (reg >> 1) & 0xf,
- (reg >> 17) & 0x7);
+ SYSREG_OP0(reg),
+ SYSREG_OP1(reg),
+ SYSREG_CRN(reg),
+ SYSREG_CRM(reg),
+ SYSREG_OP2(reg));
hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized());
return 1;
}
--
2.25.1
next prev parent reply other threads:[~2022-02-21 9:38 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-21 9:27 [PULL 00/26] target-arm queue Peter Maydell
2022-02-21 9:27 ` [PULL 01/26] MAINTAINERS: Adding myself as a reviewer of some components Peter Maydell
2022-02-21 9:27 ` [PULL 02/26] tests/qtest: add qtests for npcm7xx sdhci Peter Maydell
2022-02-21 9:27 ` Peter Maydell [this message]
2022-02-21 9:27 ` [PULL 04/26] hvf: arm: Handle unknown ID registers as RES0 Peter Maydell
2022-02-21 9:27 ` [PULL 05/26] Mark remaining global TypeInfo instances as const Peter Maydell
2022-02-21 9:27 ` [PULL 06/26] checkpatch: Ensure that TypeInfos are const Peter Maydell
2022-02-21 9:27 ` [PULL 07/26] target/arm: Move '-cpu host' code to cpu64.c Peter Maydell
2022-02-21 9:27 ` [PULL 08/26] target/arm: Use aarch64_cpu_register() for 'host' CPU type Peter Maydell
2022-02-21 9:27 ` [PULL 09/26] target/arm: Make KVM -cpu max exactly like -cpu host Peter Maydell
2022-02-21 9:27 ` [PULL 10/26] target/arm: Unindent unnecessary else-clause Peter Maydell
2022-02-21 9:27 ` [PULL 11/26] target/arm: Fix '-cpu max' for HVF Peter Maydell
2022-02-21 9:27 ` [PULL 12/26] target/arm: Support PAuth extension for hvf Peter Maydell
2022-02-21 9:27 ` [PULL 13/26] Kconfig: Add I2C_DEVICES device group Peter Maydell
2022-02-21 9:27 ` [PULL 14/26] Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus Peter Maydell
2022-02-21 9:27 ` [PULL 15/26] hw/arm/armv7m: Handle disconnected clock inputs Peter Maydell
2022-02-21 9:27 ` [PULL 16/26] include: Move qemu_madvise() and related #defines to new qemu/madvise.h Peter Maydell
2022-02-21 9:27 ` [PULL 17/26] include: Move qemu_mprotect_*() to new qemu/mprotect.h Peter Maydell
2022-02-21 9:27 ` [PULL 18/26] include: Move QEMU_MAP_* constants to mmap-alloc.h Peter Maydell
2022-02-21 9:27 ` [PULL 19/26] include: Move qemu_[id]cache_* declarations to new qemu/cacheinfo.h Peter Maydell
2022-02-21 9:27 ` [PULL 20/26] include: Move hardware version declarations to new qemu/hw-version.h Peter Maydell
2022-02-21 9:27 ` [PULL 21/26] MAINTAINERS: Add Akihiko Odaki to macOS-relateds Peter Maydell
2022-02-21 9:27 ` [PULL 22/26] hw/timer: fix a9gtimer vmstate Peter Maydell
2022-02-21 9:27 ` [PULL 23/26] hw/arm: add initial mori-bmc board Peter Maydell
2022-02-21 9:27 ` [PULL 24/26] ui/cocoa: Remove allowedFileTypes restriction in SavePanel Peter Maydell
2022-02-21 9:27 ` [PULL 25/26] ui/cocoa: Do not alert even without block devices Peter Maydell
2022-02-21 9:28 ` [PULL 26/26] ui/cocoa: Fix the leak of qemu_console_get_label Peter Maydell
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