From: Yang Zhong <yang.zhong@intel.com>
To: David Edmondson <david.edmondson@oracle.com>
Cc: yang.zhong@intel.com, kevin.tian@intel.com, seanjc@google.com,
jing2.liu@linux.intel.com, qemu-devel@nongnu.org,
wei.w.wang@intel.com, pbonzini@redhat.com, guang.zeng@intel.com
Subject: Re: [PATCH v2 4/8] x86: Add XFD faulting bit for state components
Date: Fri, 25 Feb 2022 15:10:25 +0800 [thread overview]
Message-ID: <20220225071025.GA24485@yangzhon-Virtual> (raw)
In-Reply-To: <cun1qzwpe6e.fsf@oracle.com>
On Mon, Feb 21, 2022 at 01:00:41PM +0000, David Edmondson wrote:
> On Wednesday, 2022-02-16 at 22:04:30 -08, Yang Zhong wrote:
>
> > From: Jing Liu <jing2.liu@intel.com>
> >
> > Intel introduces XFD faulting mechanism for extended
> > XSAVE features to dynamically enable the features in
> > runtime. If CPUID (EAX=0Dh, ECX=n, n>1).ECX[2] is set
> > as 1, it indicates support for XFD faulting of this
> > state component.
> >
> > Signed-off-by: Jing Liu <jing2.liu@intel.com>
> > Signed-off-by: Yang Zhong <yang.zhong@intel.com>
>
> Small comment below...
>
> Reviewed-by: David Edmondson <david.edmondson@oracle.com>
>
> > ---
> > target/i386/cpu.h | 2 ++
> > target/i386/cpu.c | 3 ++-
> > 2 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> > index d4ad0f56bd..f7fc2e97a6 100644
> > --- a/target/i386/cpu.h
> > +++ b/target/i386/cpu.h
> > @@ -558,8 +558,10 @@ typedef enum X86Seg {
> > #define ARCH_REQ_XCOMP_GUEST_PERM 0x1025
> >
> > #define ESA_FEATURE_ALIGN64_BIT 1
> > +#define ESA_FEATURE_XFD_BIT 2
> >
> > #define ESA_FEATURE_ALIGN64_MASK (1U << ESA_FEATURE_ALIGN64_BIT)
> > +#define ESA_FEATURE_XFD_MASK (1U << ESA_FEATURE_XFD_BIT)
> >
> > /* CPUID feature words */
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 377d993438..5a7ee8c7e1 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -5497,7 +5497,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> > const ExtSaveArea *esa = &x86_ext_save_areas[count];
> > *eax = esa->size;
> > *ebx = esa->offset;
> > - *ecx = esa->ecx & ESA_FEATURE_ALIGN64_MASK;
> > + *ecx = (esa->ecx & ESA_FEATURE_ALIGN64_MASK) |
> > + (esa->ecx & ESA_FEATURE_XFD_MASK);
>
> Is:
>
> *ecx = esa->ecx &
> (ESA_FEATURE_ALIGN64_MASK | ESA_FEATURE_XFD_MASK);
>
> not more usual?
Thanks David, I will update this in next version.
Yang
>
> > }
> > }
> > break;
>
> dme.
> --
> All of us, we're going out tonight. We're gonna walk all over your cars.
next prev parent reply other threads:[~2022-02-25 7:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 6:04 [PATCH v2 0/8] AMX support in Qemu Yang Zhong
2022-02-17 6:04 ` [PATCH v2 1/8] x86: Fix the 64-byte boundary enumeration for extended state Yang Zhong
2022-02-21 12:51 ` David Edmondson
2022-02-17 6:04 ` [PATCH v2 2/8] x86: Add AMX XTILECFG and XTILEDATA components Yang Zhong
2022-02-21 12:53 ` David Edmondson
2022-02-17 6:04 ` [PATCH v2 3/8] x86: Grant AMX permission for guest Yang Zhong
2022-02-17 5:58 ` Yang Zhong
2022-02-17 13:44 ` Paolo Bonzini
2022-02-25 10:40 ` Yang Zhong
2022-02-17 6:04 ` [PATCH v2 4/8] x86: Add XFD faulting bit for state components Yang Zhong
2022-02-21 13:00 ` David Edmondson
2022-02-25 7:10 ` Yang Zhong [this message]
2022-02-17 6:04 ` [PATCH v2 5/8] x86: Add AMX CPUIDs enumeration Yang Zhong
2022-02-23 11:30 ` David Edmondson
2022-02-17 6:04 ` [PATCH v2 6/8] x86: add support for KVM_CAP_XSAVE2 and AMX state migration Yang Zhong
2022-02-21 13:25 ` David Edmondson
2022-02-25 7:33 ` Yang Zhong
2022-02-17 6:04 ` [PATCH v2 7/8] x86: Support XFD and AMX xsave data migration Yang Zhong
2022-02-21 13:30 ` David Edmondson
2022-02-17 6:04 ` [PATCH v2 8/8] linux-header: Sync the linux headers Yang Zhong
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