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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id qh23-20020a170906ecb700b006d6e97b94aesm213402ejb.9.2022.03.01.00.43.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 00:43:55 -0800 (PST) Date: Tue, 1 Mar 2022 09:43:54 +0100 From: Igor Mammedov To: Liav Albani Subject: Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table Message-ID: <20220301094354.1d37f470@redhat.com> In-Reply-To: <20220228201733.714580-3-liavalb@gmail.com> References: <20220228201733.714580-1-liavalb@gmail.com> <20220228201733.714580-3-liavalb@gmail.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ani@anisinha.ca, shentey@gmail.com, qemu-devel@nongnu.org, mst@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 28 Feb 2022 22:17:32 +0200 Liav Albani wrote: > This can allow the guest OS to determine more easily if i8042 controller > is present in the system or not, so it doesn't need to do probing of the > controller, but just initialize it immediately, before enumerating the > ACPI AML namespace. > > This change only applies to the x86/q35 machine type, as it uses FACP > ACPI table with revision higher than 1, which should implement at least > ACPI 2.0 features within the table, hence it can also set the IA-PC boot > flags register according to the ACPI 2.0 specification. > > Signed-off-by: Liav Albani > --- > hw/acpi/aml-build.c | 11 ++++++++++- > hw/i386/acpi-build.c | 9 +++++++++ > hw/i386/acpi-microvm.c | 9 +++++++++ commit message says it's q35 specific, so wy it touched microvm anc piix4? > include/hw/acpi/acpi-defs.h | 1 + > 4 files changed, 29 insertions(+), 1 deletion(-) > > diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c > index 8966e16320..2085905b83 100644 > --- a/hw/acpi/aml-build.c > +++ b/hw/acpi/aml-build.c > @@ -2152,7 +2152,16 @@ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, > build_append_int_noprefix(tbl, 0, 1); /* DAY_ALRM */ > build_append_int_noprefix(tbl, 0, 1); /* MON_ALRM */ > build_append_int_noprefix(tbl, f->rtc_century, 1); /* CENTURY */ > - build_append_int_noprefix(tbl, 0, 2); /* IAPC_BOOT_ARCH */ > + /* IAPC_BOOT_ARCH */ > + /* > + * This register is not defined in ACPI spec version 1.0, where the FACP > + * revision == 1 also applies. Therefore, just ignore setting this register. > + */ > + if (f->rev == 1) { > + build_append_int_noprefix(tbl, 0, 2); > + } else { > + build_append_int_noprefix(tbl, f->iapc_boot_arch, 2); > + } > build_append_int_noprefix(tbl, 0, 1); /* Reserved */ > build_append_int_noprefix(tbl, f->flags, 4); /* Flags */ > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index ebd47aa26f..c72c7bb9bb 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -38,6 +38,7 @@ > #include "hw/nvram/fw_cfg.h" > #include "hw/acpi/bios-linker-loader.h" > #include "hw/isa/isa.h" > +#include "hw/input/i8042.h" > #include "hw/block/fdc.h" > #include "hw/acpi/memory_hotplug.h" > #include "sysemu/tpm.h" > @@ -192,6 +193,14 @@ static void init_common_fadt_data(MachineState *ms, Object *o, > .address = object_property_get_uint(o, ACPI_PM_PROP_GPE0_BLK, NULL) > }, > }; > + /* > + * second bit of 16 of the IAPC_BOOT_ARCH register indicates i8042 presence > + * or equivalent micro controller. See table 5-10 of APCI spec version 2.0 > + * (the earliest acpi revision that supports this). /* APCI spec version 2.0, Table 5-10 */ is sufficient, the rest could be read from spec/ > + */ > + fadt.iapc_boot_arch = object_resolve_path_type("", TYPE_I8042, NULL) ? > + 0x0002 : 0x0000; > + > *data = fadt; > } > > diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c > index 68ca7e7fc2..4bc72b1672 100644 > --- a/hw/i386/acpi-microvm.c > +++ b/hw/i386/acpi-microvm.c > @@ -31,6 +31,7 @@ > #include "hw/acpi/generic_event_device.h" > #include "hw/acpi/utils.h" > #include "hw/acpi/erst.h" > +#include "hw/input/i8042.h" > #include "hw/i386/fw_cfg.h" > #include "hw/i386/microvm.h" > #include "hw/pci/pci.h" > @@ -189,6 +190,14 @@ static void acpi_build_microvm(AcpiBuildTables *tables, > .reset_val = ACPI_GED_RESET_VALUE, > }; > > + /* > + * second bit of 16 of the IAPC_BOOT_ARCH register indicates i8042 presence > + * or equivalent micro controller. See table 5-10 of APCI spec version 2.0 > + * (the earliest acpi revision that supports this). > + */ > + pmfadt.iapc_boot_arch = object_resolve_path_type("", TYPE_I8042, NULL) ? > + 0x0002 : 0x0000; > + > table_offsets = g_array_new(false, true /* clear */, > sizeof(uint32_t)); > bios_linker_loader_alloc(tables->linker, > diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h > index c97e8633ad..2b42e4192b 100644 > --- a/include/hw/acpi/acpi-defs.h > +++ b/include/hw/acpi/acpi-defs.h > @@ -77,6 +77,7 @@ typedef struct AcpiFadtData { > uint16_t plvl2_lat; /* P_LVL2_LAT */ > uint16_t plvl3_lat; /* P_LVL3_LAT */ > uint16_t arm_boot_arch; /* ARM_BOOT_ARCH */ > + uint16_t iapc_boot_arch; /* IAPC_BOOT_ARCH */ > uint8_t minor_ver; /* FADT Minor Version */ > > /*