From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org,
alex.bennee@linaro.org,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v4 06/18] target/arm: Use MAKE_64BIT_MASK to compute indexmask
Date: Tue, 1 Mar 2022 11:59:46 -1000 [thread overview]
Message-ID: <20220301215958.157011-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220301215958.157011-1-richard.henderson@linaro.org>
The macro is a bit more readable than the inlined computation.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 431b0c1405..675aec4bf3 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11518,8 +11518,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
level = startlevel;
}
- indexmask_grainsize = (1ULL << (stride + 3)) - 1;
- indexmask = (1ULL << (inputsize - (stride * (4 - level)))) - 1;
+ indexmask_grainsize = MAKE_64BIT_MASK(0, stride + 3);
+ indexmask = MAKE_64BIT_MASK(0, inputsize - (stride * (4 - level)));
/* Now we can extract the actual base address from the TTBR */
descaddr = extract64(ttbr, 0, 48);
--
2.25.1
next prev parent reply other threads:[~2022-03-01 22:06 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-01 21:59 [PATCH v4 00/18] target/arm: Implement LVA, LPA, LPA2 features Richard Henderson
2022-03-01 21:59 ` [PATCH v4 01/18] hw/registerfields: Add FIELD_SEX<N> and FIELD_SDP<N> Richard Henderson
2022-03-01 21:59 ` [PATCH v4 02/18] target/arm: Set TCR_EL1.TSZ for user-only Richard Henderson
2022-03-01 21:59 ` [PATCH v4 03/18] target/arm: Fault on invalid TCR_ELx.TxSZ Richard Henderson
2022-03-01 21:59 ` [PATCH v4 04/18] target/arm: Move arm_pamax out of line Richard Henderson
2022-03-01 21:59 ` [PATCH v4 05/18] target/arm: Pass outputsize down to check_s2_mmu_setup Richard Henderson
2022-03-01 21:59 ` Richard Henderson [this message]
2022-03-01 21:59 ` [PATCH v4 07/18] target/arm: Honor TCR_ELx.{I}PS Richard Henderson
2022-03-01 21:59 ` [PATCH v4 08/18] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA Richard Henderson
2022-03-01 21:59 ` [PATCH v4 09/18] target/arm: Implement FEAT_LVA Richard Henderson
2022-03-01 21:59 ` [PATCH v4 10/18] target/arm: Implement FEAT_LPA Richard Henderson
2022-03-01 21:59 ` [PATCH v4 11/18] target/arm: Extend arm_fi_to_lfsc to level -1 Richard Henderson
2022-03-01 21:59 ` [PATCH v4 12/18] target/arm: Introduce tlbi_aa64_get_range Richard Henderson
2022-03-01 21:59 ` [PATCH v4 13/18] target/arm: Fix TLBIRange.base for 16k and 64k pages Richard Henderson
2022-03-01 21:59 ` [PATCH v4 14/18] target/arm: Validate tlbi TG matches translation granule in use Richard Henderson
2022-03-01 21:59 ` [PATCH v4 15/18] target/arm: Advertise all page sizes for -cpu max Richard Henderson
2022-03-01 22:20 ` Peter Maydell
2022-03-01 21:59 ` [PATCH v4 16/18] target/arm: Implement FEAT_LPA2 Richard Henderson
2022-03-01 21:59 ` [PATCH v4 17/18] target/arm: Provide cpu property for controling FEAT_LPA2 Richard Henderson
2022-03-04 11:53 ` Peter Maydell
2022-03-01 21:59 ` [PATCH v4 18/18] hw/arm/virt: Disable LPA2 for -machine virt-6.2 Richard Henderson
2022-03-04 11:52 ` Peter Maydell
2022-03-04 19:52 ` Richard Henderson
2022-03-04 22:14 ` Peter Maydell
2022-03-04 22:28 ` Richard Henderson
2022-03-02 11:08 ` [PATCH v4 00/18] target/arm: Implement LVA, LPA, LPA2 features Peter Maydell
2022-03-07 13:47 ` Peter Maydell
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