From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Lucas Mateus Castro (alqotel)" <lucas.castro@eldorado.org.br>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Lucas Mateus Castro" <lucas.araujo@eldorado.org.br>,
"Cédric Le Goater" <clg@kaod.org>,
"Matheus Ferst" <matheus.ferst@eldorado.org.br>
Subject: [PULL 08/87] target/ppc: moved vector even and odd multiplication to decodetree
Date: Wed, 2 Mar 2022 12:06:44 +0100 [thread overview]
Message-ID: <20220302110803.849505-9-clg@kaod.org> (raw)
In-Reply-To: <20220302110803.849505-1-clg@kaod.org>
From: "Lucas Mateus Castro (alqotel)" <lucas.castro@eldorado.org.br>
Moved the instructions vmulesb, vmulosb, vmuleub, vmuloub,
vmulesh, vmulosh, vmuleuh, vmulouh, vmulesw, vmulosw,
muleuw and vmulouw from legacy to decodetree. Implemented
the instructions vmulesd, vmulosd, vmuleud, vmuloud.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/helper.h | 24 ++++-----
target/ppc/insn32.decode | 22 +++++++++
target/ppc/int_helper.c | 20 ++++----
target/ppc/translate/vmx-impl.c.inc | 77 ++++++++++++++++++++++-------
target/ppc/translate/vmx-ops.c.inc | 15 ++----
tcg/ppc/tcg-target.c.inc | 6 +++
6 files changed, 112 insertions(+), 52 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index ae7d503fcf2f..c399fab1a830 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -192,18 +192,18 @@ DEF_HELPER_3(vmrglw, void, avr, avr, avr)
DEF_HELPER_3(vmrghb, void, avr, avr, avr)
DEF_HELPER_3(vmrghh, void, avr, avr, avr)
DEF_HELPER_3(vmrghw, void, avr, avr, avr)
-DEF_HELPER_3(vmulesb, void, avr, avr, avr)
-DEF_HELPER_3(vmulesh, void, avr, avr, avr)
-DEF_HELPER_3(vmulesw, void, avr, avr, avr)
-DEF_HELPER_3(vmuleub, void, avr, avr, avr)
-DEF_HELPER_3(vmuleuh, void, avr, avr, avr)
-DEF_HELPER_3(vmuleuw, void, avr, avr, avr)
-DEF_HELPER_3(vmulosb, void, avr, avr, avr)
-DEF_HELPER_3(vmulosh, void, avr, avr, avr)
-DEF_HELPER_3(vmulosw, void, avr, avr, avr)
-DEF_HELPER_3(vmuloub, void, avr, avr, avr)
-DEF_HELPER_3(vmulouh, void, avr, avr, avr)
-DEF_HELPER_3(vmulouw, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULESB, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULESH, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULESW, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULEUB, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULEUH, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULEUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOSB, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOSH, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOSW, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOUB, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOUH, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VMULOUW, TCG_CALL_NO_RWG, void, avr, avr, avr)
DEF_HELPER_3(vmulhsw, void, avr, avr, avr)
DEF_HELPER_3(vmulhuw, void, avr, avr, avr)
DEF_HELPER_3(vmulhsd, void, avr, avr, avr)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 2a9c91a4235e..092ea796184c 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -440,6 +440,28 @@ VEXTRACTWM 000100 ..... 01010 ..... 11001000010 @VX_tb
VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb
VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb
+## Vector Multiply Instruction
+
+VMULESB 000100 ..... ..... ..... 01100001000 @VX
+VMULOSB 000100 ..... ..... ..... 00100001000 @VX
+VMULEUB 000100 ..... ..... ..... 01000001000 @VX
+VMULOUB 000100 ..... ..... ..... 00000001000 @VX
+
+VMULESH 000100 ..... ..... ..... 01101001000 @VX
+VMULOSH 000100 ..... ..... ..... 00101001000 @VX
+VMULEUH 000100 ..... ..... ..... 01001001000 @VX
+VMULOUH 000100 ..... ..... ..... 00001001000 @VX
+
+VMULESW 000100 ..... ..... ..... 01110001000 @VX
+VMULOSW 000100 ..... ..... ..... 00110001000 @VX
+VMULEUW 000100 ..... ..... ..... 01010001000 @VX
+VMULOUW 000100 ..... ..... ..... 00010001000 @VX
+
+VMULESD 000100 ..... ..... ..... 01111001000 @VX
+VMULOSD 000100 ..... ..... ..... 00111001000 @VX
+VMULEUD 000100 ..... ..... ..... 01011001000 @VX
+VMULOUD 000100 ..... ..... ..... 00011001000 @VX
+
# VSX Load/Store Instructions
LXV 111101 ..... ..... ............ . 001 @DQ_TSX
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index d1b12788b215..c9f34ce3ca4e 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1063,7 +1063,7 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
}
#define VMUL_DO_EVN(name, mul_element, mul_access, prod_access, cast) \
- void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
+ void helper_V##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
{ \
int i; \
\
@@ -1074,7 +1074,7 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
}
#define VMUL_DO_ODD(name, mul_element, mul_access, prod_access, cast) \
- void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
+ void helper_V##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
{ \
int i; \
\
@@ -1085,14 +1085,14 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
}
#define VMUL(suffix, mul_element, mul_access, prod_access, cast) \
- VMUL_DO_EVN(mule##suffix, mul_element, mul_access, prod_access, cast) \
- VMUL_DO_ODD(mulo##suffix, mul_element, mul_access, prod_access, cast)
-VMUL(sb, s8, VsrSB, VsrSH, int16_t)
-VMUL(sh, s16, VsrSH, VsrSW, int32_t)
-VMUL(sw, s32, VsrSW, VsrSD, int64_t)
-VMUL(ub, u8, VsrB, VsrH, uint16_t)
-VMUL(uh, u16, VsrH, VsrW, uint32_t)
-VMUL(uw, u32, VsrW, VsrD, uint64_t)
+ VMUL_DO_EVN(MULE##suffix, mul_element, mul_access, prod_access, cast) \
+ VMUL_DO_ODD(MULO##suffix, mul_element, mul_access, prod_access, cast)
+VMUL(SB, s8, VsrSB, VsrSH, int16_t)
+VMUL(SH, s16, VsrSH, VsrSW, int32_t)
+VMUL(SW, s32, VsrSW, VsrSD, int64_t)
+VMUL(UB, u8, VsrB, VsrH, uint16_t)
+VMUL(UH, u16, VsrH, VsrW, uint32_t)
+VMUL(UW, u32, VsrW, VsrD, uint64_t)
#undef VMUL_DO_EVN
#undef VMUL_DO_ODD
#undef VMUL
diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index d5e02fd7f22e..a34a080e8324 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -798,29 +798,11 @@ static void trans_vclzd(DisasContext *ctx)
tcg_temp_free_i64(avr);
}
-GEN_VXFORM(vmuloub, 4, 0);
-GEN_VXFORM(vmulouh, 4, 1);
-GEN_VXFORM(vmulouw, 4, 2);
GEN_VXFORM_V(vmuluwm, MO_32, tcg_gen_gvec_mul, 4, 2);
-GEN_VXFORM_DUAL(vmulouw, PPC_ALTIVEC, PPC_NONE,
- vmuluwm, PPC_NONE, PPC2_ALTIVEC_207)
-GEN_VXFORM(vmulosb, 4, 4);
-GEN_VXFORM(vmulosh, 4, 5);
-GEN_VXFORM(vmulosw, 4, 6);
GEN_VXFORM_V(vmulld, MO_64, tcg_gen_gvec_mul, 4, 7);
-GEN_VXFORM(vmuleub, 4, 8);
-GEN_VXFORM(vmuleuh, 4, 9);
-GEN_VXFORM(vmuleuw, 4, 10);
GEN_VXFORM(vmulhuw, 4, 10);
GEN_VXFORM(vmulhud, 4, 11);
-GEN_VXFORM_DUAL(vmuleuw, PPC_ALTIVEC, PPC_NONE,
- vmulhuw, PPC_NONE, PPC2_ISA310);
-GEN_VXFORM(vmulesb, 4, 12);
-GEN_VXFORM(vmulesh, 4, 13);
-GEN_VXFORM(vmulesw, 4, 14);
GEN_VXFORM(vmulhsw, 4, 14);
-GEN_VXFORM_DUAL(vmulesw, PPC_ALTIVEC, PPC_NONE,
- vmulhsw, PPC_NONE, PPC2_ISA310);
GEN_VXFORM(vmulhsd, 4, 15);
GEN_VXFORM_V(vslb, MO_8, tcg_gen_gvec_shlv, 2, 4);
GEN_VXFORM_V(vslh, MO_16, tcg_gen_gvec_shlv, 2, 5);
@@ -2104,6 +2086,65 @@ static bool trans_VPEXTD(DisasContext *ctx, arg_VX *a)
return true;
}
+static bool do_vx_helper(DisasContext *ctx, arg_VX *a,
+ void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr))
+{
+ TCGv_ptr ra, rb, rd;
+ REQUIRE_VECTOR(ctx);
+
+ ra = gen_avr_ptr(a->vra);
+ rb = gen_avr_ptr(a->vrb);
+ rd = gen_avr_ptr(a->vrt);
+ gen_helper(rd, ra, rb);
+ tcg_temp_free_ptr(ra);
+ tcg_temp_free_ptr(rb);
+ tcg_temp_free_ptr(rd);
+
+ return true;
+}
+
+static bool do_vx_vmuleo(DisasContext *ctx, arg_VX *a, bool even,
+ void (*gen_mul)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64))
+{
+ TCGv_i64 vra, vrb, vrt0, vrt1;
+ REQUIRE_VECTOR(ctx);
+
+ vra = tcg_temp_new_i64();
+ vrb = tcg_temp_new_i64();
+ vrt0 = tcg_temp_new_i64();
+ vrt1 = tcg_temp_new_i64();
+
+ get_avr64(vra, a->vra, even);
+ get_avr64(vrb, a->vrb, even);
+ gen_mul(vrt0, vrt1, vra, vrb);
+ set_avr64(a->vrt, vrt0, false);
+ set_avr64(a->vrt, vrt1, true);
+
+ tcg_temp_free_i64(vra);
+ tcg_temp_free_i64(vrb);
+ tcg_temp_free_i64(vrt0);
+ tcg_temp_free_i64(vrt1);
+
+ return true;
+}
+
+TRANS_FLAGS2(ALTIVEC_207, VMULESB, do_vx_helper, gen_helper_VMULESB)
+TRANS_FLAGS2(ALTIVEC_207, VMULOSB, do_vx_helper, gen_helper_VMULOSB)
+TRANS_FLAGS2(ALTIVEC_207, VMULEUB, do_vx_helper, gen_helper_VMULEUB)
+TRANS_FLAGS2(ALTIVEC_207, VMULOUB, do_vx_helper, gen_helper_VMULOUB)
+TRANS_FLAGS2(ALTIVEC_207, VMULESH, do_vx_helper, gen_helper_VMULESH)
+TRANS_FLAGS2(ALTIVEC_207, VMULOSH, do_vx_helper, gen_helper_VMULOSH)
+TRANS_FLAGS2(ALTIVEC_207, VMULEUH, do_vx_helper, gen_helper_VMULEUH)
+TRANS_FLAGS2(ALTIVEC_207, VMULOUH, do_vx_helper, gen_helper_VMULOUH)
+TRANS_FLAGS2(ALTIVEC_207, VMULESW, do_vx_helper, gen_helper_VMULESW)
+TRANS_FLAGS2(ALTIVEC_207, VMULOSW, do_vx_helper, gen_helper_VMULOSW)
+TRANS_FLAGS2(ALTIVEC_207, VMULEUW, do_vx_helper, gen_helper_VMULEUW)
+TRANS_FLAGS2(ALTIVEC_207, VMULOUW, do_vx_helper, gen_helper_VMULOUW)
+TRANS_FLAGS2(ISA310, VMULESD, do_vx_vmuleo, true , tcg_gen_muls2_i64)
+TRANS_FLAGS2(ISA310, VMULOSD, do_vx_vmuleo, false, tcg_gen_muls2_i64)
+TRANS_FLAGS2(ISA310, VMULEUD, do_vx_vmuleo, true , tcg_gen_mulu2_i64)
+TRANS_FLAGS2(ISA310, VMULOUD, do_vx_vmuleo, false, tcg_gen_mulu2_i64)
+
#undef GEN_VR_LDX
#undef GEN_VR_STX
#undef GEN_VR_LVE
diff --git a/target/ppc/translate/vmx-ops.c.inc b/target/ppc/translate/vmx-ops.c.inc
index 25ee715b4326..f310b2fbde95 100644
--- a/target/ppc/translate/vmx-ops.c.inc
+++ b/target/ppc/translate/vmx-ops.c.inc
@@ -101,20 +101,11 @@ GEN_VXFORM_DUAL(vmrgow, vextuwlx, 6, 26, PPC_NONE, PPC2_ALTIVEC_207),
GEN_VXFORM_300(vextubrx, 6, 28),
GEN_VXFORM_300(vextuhrx, 6, 29),
GEN_VXFORM_DUAL(vmrgew, vextuwrx, 6, 30, PPC_NONE, PPC2_ALTIVEC_207),
-GEN_VXFORM(vmuloub, 4, 0),
-GEN_VXFORM(vmulouh, 4, 1),
-GEN_VXFORM_DUAL(vmulouw, vmuluwm, 4, 2, PPC_ALTIVEC, PPC_NONE),
-GEN_VXFORM(vmulosb, 4, 4),
-GEN_VXFORM(vmulosh, 4, 5),
-GEN_VXFORM_207(vmulosw, 4, 6),
+GEN_VXFORM_207(vmuluwm, 4, 2),
GEN_VXFORM_310(vmulld, 4, 7),
-GEN_VXFORM(vmuleub, 4, 8),
-GEN_VXFORM(vmuleuh, 4, 9),
-GEN_VXFORM_DUAL(vmuleuw, vmulhuw, 4, 10, PPC_ALTIVEC, PPC_NONE),
+GEN_VXFORM_310(vmulhuw, 4, 10),
GEN_VXFORM_310(vmulhud, 4, 11),
-GEN_VXFORM(vmulesb, 4, 12),
-GEN_VXFORM(vmulesh, 4, 13),
-GEN_VXFORM_DUAL(vmulesw, vmulhsw, 4, 14, PPC_ALTIVEC, PPC_NONE),
+GEN_VXFORM_310(vmulhsw, 4, 14),
GEN_VXFORM_310(vmulhsd, 4, 15),
GEN_VXFORM(vslb, 2, 4),
GEN_VXFORM(vslh, 2, 5),
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index dea24f23c4db..69d22e08cbf2 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -3987,3 +3987,9 @@ void tcg_register_jit(const void *buf, size_t buf_size)
tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
}
#endif /* __ELF__ */
+#undef VMULEUB
+#undef VMULEUH
+#undef VMULEUW
+#undef VMULOUB
+#undef VMULOUH
+#undef VMULOUW
--
2.34.1
next prev parent reply other threads:[~2022-03-02 11:11 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 11:06 [PULL 00/87] ppc queue Cédric Le Goater
2022-03-02 11:06 ` [PULL 01/87] hw/ppc/pnv: Determine ns16550's IRQ number from QOM property Cédric Le Goater
2022-03-02 11:06 ` [PULL 02/87] ppc/pnv: fix default PHB4 QOM hierarchy Cédric Le Goater
2022-03-02 11:06 ` [PULL 03/87] target/ppc: make power8-pmu.c CONFIG_TCG only Cédric Le Goater
2022-03-02 11:06 ` [PULL 04/87] target/ppc: finalize pre-EBB PMU logic Cédric Le Goater
2022-03-02 11:06 ` [PULL 05/87] target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions Cédric Le Goater
2022-03-02 11:06 ` [PULL 06/87] target/ppc: trigger PERFM EBBs from power8-pmu.c Cédric Le Goater
2022-03-02 11:06 ` [PULL 07/87] target/ppc: Introduce TRANS*FLAGS macros Cédric Le Goater
2022-03-02 11:06 ` Cédric Le Goater [this message]
2022-03-02 11:06 ` [PULL 09/87] target/ppc: Moved vector multiply high and low to decodetree Cédric Le Goater
2022-03-02 11:06 ` [PULL 10/87] target/ppc: vmulh* instructions without helpers Cédric Le Goater
2022-03-02 11:06 ` [PULL 11/87] target/ppc: Implement vmsumcud instruction Cédric Le Goater
2022-03-02 11:06 ` [PULL 12/87] target/ppc: Implement vmsumudm instruction Cédric Le Goater
2022-03-02 11:06 ` [PULL 13/87] target/ppc: Move vexts[bhw]2[wd] to decodetree Cédric Le Goater
2022-03-02 11:06 ` [PULL 14/87] target/ppc: Implement vextsd2q Cédric Le Goater
2022-03-02 11:06 ` [PULL 15/87] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree Cédric Le Goater
2022-03-02 11:06 ` [PULL 16/87] target/ppc: Move Vector Compare Not Equal or Zero " Cédric Le Goater
2022-03-02 11:06 ` [PULL 17/87] target/ppc: Implement Vector Compare Equal Quadword Cédric Le Goater
2022-03-02 11:06 ` [PULL 18/87] target/ppc: Implement Vector Compare Greater Than Quadword Cédric Le Goater
2022-03-02 11:06 ` [PULL 19/87] target/ppc: Implement Vector Compare Quadword Cédric Le Goater
2022-03-02 11:06 ` [PULL 20/87] target/ppc: implement vstri[bh][lr] Cédric Le Goater
2022-03-02 11:06 ` [PULL 21/87] target/ppc: implement vclrlb Cédric Le Goater
2022-03-02 11:06 ` [PULL 22/87] target/ppc: implement vclrrb Cédric Le Goater
2022-03-02 11:06 ` [PULL 23/87] target/ppc: implement vcntmb[bhwd] Cédric Le Goater
2022-03-02 11:07 ` [PULL 24/87] target/ppc: implement vgnb Cédric Le Goater
2022-03-02 11:07 ` [PULL 25/87] target/ppc: move vs[lr][a][bhwd] to decodetree Cédric Le Goater
2022-03-02 11:07 ` [PULL 26/87] target/ppc: implement vslq Cédric Le Goater
2022-03-02 11:07 ` [PULL 27/87] target/ppc: implement vsrq Cédric Le Goater
2022-03-02 11:07 ` [PULL 28/87] target/ppc: implement vsraq Cédric Le Goater
2022-03-02 11:07 ` [PULL 29/87] target/ppc: move vrl[bhwd] to decodetree Cédric Le Goater
2022-03-02 11:07 ` [PULL 30/87] target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi " Cédric Le Goater
2022-03-02 11:07 ` [PULL 31/87] target/ppc: implement vrlq Cédric Le Goater
2022-03-02 11:07 ` [PULL 32/87] target/ppc: implement vrlqnm Cédric Le Goater
2022-03-02 11:07 ` [PULL 33/87] target/ppc: implement vrlqmi Cédric Le Goater
2022-03-02 11:07 ` [PULL 34/87] target/ppc: Move vsel and vperm/vpermr to decodetree Cédric Le Goater
2022-03-02 11:07 ` [PULL 35/87] target/ppc: Move xxsel " Cédric Le Goater
2022-03-02 11:07 ` [PULL 36/87] target/ppc: move xxperm/xxpermr " Cédric Le Goater
2022-03-02 11:07 ` [PULL 37/87] target/ppc: Move xxpermdi " Cédric Le Goater
2022-03-02 11:07 ` [PULL 38/87] target/ppc: Implement xxpermx instruction Cédric Le Goater
2022-03-02 11:07 ` [PULL 39/87] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i Cédric Le Goater
2022-03-02 11:07 ` [PULL 40/87] target/ppc: Implement xxeval Cédric Le Goater
2022-03-02 11:07 ` [PULL 41/87] target/ppc: Implement xxgenpcv[bhwd]m instruction Cédric Le Goater
2022-03-02 11:07 ` [PULL 42/87] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree Cédric Le Goater
2022-03-02 11:07 ` [PULL 43/87] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o] Cédric Le Goater
2022-03-02 11:07 ` [PULL 44/87] target/ppc: Implement xvtlsbb instruction Cédric Le Goater
2022-03-02 11:07 ` [PULL 45/87] target/ppc: Remove xscmpnedp instruction Cédric Le Goater
2022-03-02 11:07 ` [PULL 46/87] target/ppc: Refactor VSX_SCALAR_CMP_DP Cédric Le Goater
2022-03-02 11:07 ` [PULL 47/87] target/ppc: Implement xscmp{eq,ge,gt}qp Cédric Le Goater
2022-03-02 11:07 ` [PULL 48/87] target/ppc: Move xscmp{eq,ge,gt}dp to decodetree Cédric Le Goater
2022-03-02 11:07 ` [PULL 49/87] target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3 Cédric Le Goater
2022-03-02 11:07 ` [PULL 50/87] target/ppc: Refactor VSX_MAX_MINC helper Cédric Le Goater
2022-03-02 11:07 ` [PULL 51/87] target/ppc: Implement xs{max,min}cqp Cédric Le Goater
2022-03-02 11:07 ` [PULL 52/87] target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions Cédric Le Goater
2022-03-02 11:07 ` [PULL 53/87] target/ppc: implement plxsd/pstxsd Cédric Le Goater
2022-03-02 11:07 ` [PULL 54/87] target/ppc: implement plxssp/pstxssp Cédric Le Goater
2022-03-02 11:07 ` [PULL 55/87] target/ppc: implement lxvr[bhwd]/stxvr[bhwd]x Cédric Le Goater
2022-03-02 11:07 ` [PULL 56/87] ppc/xive2: Introduce a XIVE2 core framework Cédric Le Goater
2022-03-02 11:07 ` [PULL 57/87] ppc/xive2: Introduce a presenter matching routine Cédric Le Goater
2022-03-02 11:07 ` [PULL 58/87] ppc/pnv: Add a XIVE2 controller to the POWER10 chip Cédric Le Goater
2022-03-02 11:07 ` [PULL 59/87] ppc/pnv: Add a OCC model for POWER10 Cédric Le Goater
2022-03-02 11:07 ` [PULL 60/87] ppc/pnv: Add POWER10 quads Cédric Le Goater
2022-03-02 11:07 ` [PULL 61/87] ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge Cédric Le Goater
2022-03-02 11:07 ` [PULL 62/87] ppc/pnv: Add a HOMER model to POWER10 Cédric Le Goater
2022-03-02 11:07 ` [PULL 63/87] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10) Cédric Le Goater
2022-03-02 11:07 ` [PULL 64/87] ppc/xive2: Add support for notification injection on ESB pages Cédric Le Goater
2022-03-02 11:07 ` [PULL 65/87] ppc/xive: Add support for PQ state bits offload Cédric Le Goater
2022-03-02 11:07 ` [PULL 66/87] ppc/pnv: Add support for PQ offload on PHB5 Cédric Le Goater
2022-03-02 11:07 ` [PULL 67/87] ppc/pnv: Add support for PHB5 "Address-based trigger" mode Cédric Le Goater
2022-03-02 11:07 ` [PULL 68/87] pnv/xive2: Introduce new capability bits Cédric Le Goater
2022-03-02 11:07 ` [PULL 69/87] ppc/pnv: add XIVE Gen2 TIMA support Cédric Le Goater
2022-03-02 11:07 ` [PULL 70/87] pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) Cédric Le Goater
2022-03-02 11:07 ` [PULL 71/87] xive2: Add a get_config() handler for the router configuration Cédric Le Goater
2022-03-02 11:07 ` [PULL 72/87] pnv/xive2: Add support for automatic save&restore Cédric Le Goater
2022-03-02 11:07 ` [PULL 73/87] pnv/xive2: Add support for 8bits thread id Cédric Le Goater
2022-03-02 11:07 ` [PULL 74/87] hw/ppc/spapr.c: use g_autofree in spapr_dt_chosen() Cédric Le Goater
2022-03-02 11:07 ` [PULL 75/87] hw/ppc/spapr.c: fail early if no firmware found in machine_init() Cédric Le Goater
2022-03-02 11:07 ` [PULL 76/87] hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_set_string() Cédric Le Goater
2022-03-02 11:07 ` [PULL 77/87] hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_get_string() Cédric Le Goater
2022-03-02 11:07 ` [PULL 78/87] hw/ppc/spapr_caps.c: use g_autofree in spapr_caps_add_properties() Cédric Le Goater
2022-03-02 11:07 ` [PULL 79/87] hw/ppc/spapr_drc.c: use g_auto in spapr_dt_drc() Cédric Le Goater
2022-03-02 11:07 ` [PULL 80/87] hw/ppc/spapr_drc.c: use g_autofree in drc_realize() Cédric Le Goater
2022-03-02 11:07 ` [PULL 81/87] hw/ppc/spapr_drc.c: use g_autofree in drc_unrealize() Cédric Le Goater
2022-03-02 11:07 ` [PULL 82/87] hw/ppc/spapr_drc.c: use g_autofree in spapr_dr_connector_new() Cédric Le Goater
2022-03-02 11:07 ` [PULL 83/87] hw/ppc/spapr_drc.c: use g_autofree in spapr_drc_by_index() Cédric Le Goater
2022-03-02 11:08 ` [PULL 84/87] hw/ppc/spapr_numa.c: simplify spapr_numa_write_assoc_lookup_arrays() Cédric Le Goater
2022-03-02 11:08 ` [PULL 85/87] spapr_pci_nvlink2.c: use g_autofree in spapr_phb_nvgpu_ram_populate_dt() Cédric Le Goater
2022-03-02 11:08 ` [PULL 86/87] hw/ppc/spapr_rtas.c: use g_autofree in rtas_ibm_get_system_parameter() Cédric Le Goater
2022-03-02 11:08 ` [PULL 87/87] hw/ppc/spapr_vio.c: use g_autofree in spapr_dt_vdevice() Cédric Le Goater
2022-03-02 16:58 ` [PULL 00/87] ppc queue Peter Maydell
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