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From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Matheus Ferst" <matheus.ferst@eldorado.org.br>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 06/13] tests/tcg/ppc64le: Use Altivec register names in clobber list
Date: Sat,  5 Mar 2022 12:00:03 +0100	[thread overview]
Message-ID: <20220305110010.1283654-7-clg@kaod.org> (raw)
In-Reply-To: <20220305110010.1283654-1-clg@kaod.org>

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

LLVM/Clang doesn't know the VSX registers when compiling with
-mabi=elfv1. Use only registers >= 32 and list them with their Altivec
name.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220304165417.1981159-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 tests/tcg/ppc64le/non_signalling_xscv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/tests/tcg/ppc64le/non_signalling_xscv.c b/tests/tcg/ppc64le/non_signalling_xscv.c
index 91e25cad4681..836df71ef092 100644
--- a/tests/tcg/ppc64le/non_signalling_xscv.c
+++ b/tests/tcg/ppc64le/non_signalling_xscv.c
@@ -6,16 +6,16 @@
 #define TEST(INSN, B_HI, B_LO, T_HI, T_LO) \
     do {                                                                \
         uint64_t th, tl, bh = B_HI, bl = B_LO;                          \
-        asm("mtvsrd 0, %2\n\t"                                          \
-            "mtvsrd 1, %3\n\t"                                          \
-            "xxmrghd 0, 0, 1\n\t"                                       \
-            INSN " 0, 0\n\t"                                            \
-            "mfvsrd %0, 0\n\t"                                          \
-            "xxswapd 0, 0\n\t"                                          \
-            "mfvsrd %1, 0\n\t"                                          \
+        asm("mtvsrd 32, %2\n\t"                                         \
+            "mtvsrd 33, %3\n\t"                                         \
+            "xxmrghd 32, 32, 33\n\t"                                    \
+            INSN " 32, 32\n\t"                                          \
+            "mfvsrd %0, 32\n\t"                                         \
+            "xxswapd 32, 32\n\t"                                        \
+            "mfvsrd %1, 32\n\t"                                         \
             : "=r" (th), "=r" (tl)                                      \
             : "r" (bh), "r" (bl)                                        \
-            : "vs0", "vs1");                                            \
+            : "v0", "v1");                                              \
         printf(INSN "(0x%016" PRIx64 "%016" PRIx64 ") = 0x%016" PRIx64  \
                "%016" PRIx64 "\n", bh, bl, th, tl);                     \
         assert(th == T_HI && tl == T_LO);                               \
-- 
2.34.1



  parent reply	other threads:[~2022-03-05 11:08 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-05 10:59 [PULL 00/13] ppc queue Cédric Le Goater
2022-03-05 10:59 ` [PULL 01/13] Use long endian options for ppc64 Cédric Le Goater
2022-03-05 10:59 ` [PULL 02/13] tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf Cédric Le Goater
2022-03-05 11:00 ` [PULL 03/13] target/ppc: change xs[n]madd[am]sp to use float64r32_muladd Cédric Le Goater
2022-03-05 11:00 ` [PULL 04/13] tests/tcg/ppc64le: drop __int128 usage in bcdsub Cédric Le Goater
2022-03-05 11:00 ` [PULL 05/13] tests/tcg/ppc64le: emit bcdsub with .long when needed Cédric Le Goater
2022-03-05 11:00 ` Cédric Le Goater [this message]
2022-03-05 11:00 ` [PULL 07/13] target/ppc: Fix vmul[eo]* instructions marked 2.07 Cédric Le Goater
2022-03-05 11:00 ` [PULL 08/13] target/ppc: use ext32u and deposit in do_vx_vmulhw_i64 Cédric Le Goater
2022-03-05 11:00 ` [PULL 09/13] target/ppc: use extract/extract2 to create vrlqnm mask Cédric Le Goater
2022-03-05 11:00 ` [PULL 10/13] target/ppc: use andc in vrlqmi Cédric Le Goater
2022-03-05 11:00 ` [PULL 11/13] target/ppc: split XXGENPCV macros for readability Cédric Le Goater
2022-03-05 11:00 ` [PULL 12/13] target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINC Cédric Le Goater
2022-03-05 11:00 ` [PULL 13/13] target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16 Cédric Le Goater
2022-03-06 11:57 ` [PULL 00/13] ppc queue Peter Maydell

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