From: "Philippe Mathieu-Daudé" <philippe.mathieu.daude@gmail.com>
To: Bernhard Beschow <shentey@gmail.com>, qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Michael S . Tsirkin" <mst@redhat.com>
Subject: [PATCH 06/13] hw/isa/piix4: Replace some magic IRQ constants
Date: Mon, 7 Mar 2022 14:43:46 +0100 [thread overview]
Message-ID: <20220307134353.1950-7-philippe.mathieu.daude@gmail.com> (raw)
In-Reply-To: <20220307134353.1950-1-philippe.mathieu.daude@gmail.com>
From: Bernhard Beschow <shentey@gmail.com>
This is a follow-up on patch "malta: Move PCI interrupt handling from
gt64xxx_pci to piix4". gt64xxx_pci used magic constants, and probably
didn't want to use piix4-specific constants. Now that the interrupt
handing resides in piix4, its constants can be used.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/isa/piix4.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 2e9b5ccada..f876c71750 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -61,10 +61,10 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
/* now we change the pic irq level according to the piix irq mappings */
/* XXX: optimize */
pic_irq = s->dev.config[PIIX_PIRQCA + irq_num];
- if (pic_irq < 16) {
+ if (pic_irq < ISA_NUM_IRQS) {
/* The pic level is the logical OR of all the PCI irqs mapped to it. */
pic_level = 0;
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < PIIX_NUM_PIRQS; i++) {
if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) {
pic_level |= pci_bus_get_irq_level(bus, i);
}
@@ -315,7 +315,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
NULL, 0, NULL);
}
- pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4);
+ pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS);
return dev;
}
--
2.34.1
next prev parent reply other threads:[~2022-03-07 13:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 13:43 [PATCH 00/13] hw: ISA & MIPS patches from Bernhard Beschow Philippe Mathieu-Daudé
2022-03-07 13:43 ` [PATCH 01/13] hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration Philippe Mathieu-Daudé
2022-03-08 18:09 ` Richard Henderson
2022-03-07 13:43 ` [PATCH 02/13] malta: Move PCI interrupt handling from gt64xxx_pci to piix4 Philippe Mathieu-Daudé
2022-03-07 13:43 ` [PATCH 03/13] hw/isa/piix4: Resolve redundant i8259[] attribute Philippe Mathieu-Daudé
2022-03-08 18:18 ` Richard Henderson
2022-03-07 13:43 ` [PATCH 04/13] hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() Philippe Mathieu-Daudé
2022-03-08 18:20 ` Richard Henderson
2022-03-07 13:43 ` [PATCH 05/13] hw/isa/piix4: Resolve global instance variable Philippe Mathieu-Daudé
2022-03-08 18:20 ` Richard Henderson
2022-03-07 13:43 ` Philippe Mathieu-Daudé [this message]
2022-03-08 18:21 ` [PATCH 06/13] hw/isa/piix4: Replace some magic IRQ constants Richard Henderson
2022-03-07 13:43 ` [PATCH 07/13] hw/mips/gt64xxx_pci: Resolve gt64120_register() Philippe Mathieu-Daudé
2022-03-08 18:32 ` Richard Henderson
2022-03-07 13:43 ` [PATCH 08/13] hw/rtc/mc146818rtc: QOM'ify IRQ number Philippe Mathieu-Daudé
2022-03-07 13:58 ` Bernhard Beschow
2022-03-07 13:43 ` [PATCH 09/13] hw/rtc/m48t59-isa: " Philippe Mathieu-Daudé
2022-03-07 13:59 ` Bernhard Beschow
2022-03-07 13:43 ` [PATCH 10/13] hw/input/pckbd: QOM'ify IRQ numbers Philippe Mathieu-Daudé
2022-03-07 13:59 ` Bernhard Beschow
2022-03-07 13:43 ` [PATCH 11/13] hw/isa/isa-bus: Remove isabus_dev_print() Philippe Mathieu-Daudé
2022-03-07 14:00 ` Bernhard Beschow
2022-03-07 13:43 ` [PATCH 12/13] hw/isa: Drop unused attributes from ISADevice Philippe Mathieu-Daudé
2022-03-07 14:01 ` Bernhard Beschow
2022-03-07 13:43 ` [PATCH 13/13] hw/isa: Inline and remove one-line isa_init_irq() Philippe Mathieu-Daudé
2022-03-07 13:54 ` Bernhard Beschow
2022-03-07 14:04 ` [PATCH 00/13] hw: ISA & MIPS patches from Bernhard Beschow Bernhard Beschow
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220307134353.1950-7-philippe.mathieu.daude@gmail.com \
--to=philippe.mathieu.daude@gmail.com \
--cc=f4bug@amsat.org \
--cc=mst@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=shentey@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).