* [PULL 1/2] target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO
2022-03-25 14:57 [PULL 0/2] target-arm queue Peter Maydell
@ 2022-03-25 14:57 ` Peter Maydell
2022-03-25 14:57 ` [PULL 2/2] hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() logging Peter Maydell
2022-03-26 10:19 ` [PULL 0/2] target-arm queue Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2022-03-25 14:57 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Both of these functions missed handling the TLB_MMIO flag
during the conversion to handle MTE.
Fixes: 10a85e2c8ab6 ("target/arm: Reuse sve_probe_page for gather loads")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/925
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220324010932.190428-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/sve_helper.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 07be55b7e1a..d45d0886159 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -6734,7 +6734,11 @@ void sve_ld1_z(CPUARMState *env, void *vd, uint64_t *vg, void *vm,
if (mtedesc && arm_tlb_mte_tagged(&info.attrs)) {
mte_check(env, mtedesc, addr, retaddr);
}
- host_fn(&scratch, reg_off, info.host);
+ if (unlikely(info.flags & TLB_MMIO)) {
+ tlb_fn(env, &scratch, reg_off, addr, retaddr);
+ } else {
+ host_fn(&scratch, reg_off, info.host);
+ }
} else {
/* Element crosses the page boundary. */
sve_probe_page(&info2, false, env, addr + in_page, 0,
@@ -7112,7 +7116,9 @@ void sve_st1_z(CPUARMState *env, void *vd, uint64_t *vg, void *vm,
if (likely(in_page >= msize)) {
sve_probe_page(&info, false, env, addr, 0, MMU_DATA_STORE,
mmu_idx, retaddr);
- host[i] = info.host;
+ if (!(info.flags & TLB_MMIO)) {
+ host[i] = info.host;
+ }
} else {
/*
* Element crosses the page boundary.
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PULL 2/2] hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() logging
2022-03-25 14:57 [PULL 0/2] target-arm queue Peter Maydell
2022-03-25 14:57 ` [PULL 1/2] target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO Peter Maydell
@ 2022-03-25 14:57 ` Peter Maydell
2022-03-26 10:19 ` [PULL 0/2] target-arm queue Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2022-03-25 14:57 UTC (permalink / raw)
To: qemu-devel
In commit 84d43d2e82da we rearranged the logging of errors in
process_mapc(), and inadvertently dropped the trailing newlines
from the log messages. Restore them. The same commit also
attempted to switch the ICID printing to hex (which is how we
print ICIDs elsewhere) but only did half the job, adding the
0x prefix but leaving the format string at %d; correct to %x.
Fixes: 84d43d2e82da ("hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/intc/arm_gicv3_its.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index b96b874afdf..87466732139 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -524,12 +524,12 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt)
trace_gicv3_its_cmd_mapc(icid, cte.rdbase, cte.valid);
if (icid >= s->ct.num_entries) {
- qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%d", icid);
+ qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%x\n", icid);
return CMD_CONTINUE;
}
if (cte.valid && cte.rdbase >= s->gicv3->num_cpu) {
qemu_log_mask(LOG_GUEST_ERROR,
- "ITS MAPC: invalid RDBASE %u ", cte.rdbase);
+ "ITS MAPC: invalid RDBASE %u\n", cte.rdbase);
return CMD_CONTINUE;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread