[PATCH 0/2] Confine igd-passthrough-isa-bridge to XEN

[PATCH 0/2] Confine igd-passthrough-isa-bridge to XEN

[Bernhard Beschow]

This patch series changes the "igd-passthrough-isa-bridge" device only to be
provided if CONFIG_XEN_PCI_PASSTHROUGH is true. With it xen_pt gets decoupled
from i386/pc.

Bernhard Beschow (2):
  hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN
  hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection

 hw/i386/pc_piix.c        | 118 -------------------------------------
 hw/xen/xen_pt.c          |  12 ----
 hw/xen/xen_pt.h          |   2 +
 hw/xen/xen_pt_graphics.c | 122 +++++++++++++++++++++++++++++++++++++++
 include/hw/i386/pc.h     |   1 -
 5 files changed, 124 insertions(+), 131 deletions(-)

-- 
2.35.1

[PATCH 1/2] hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN

[Bernhard Beschow]

igd-passthrough-isa-bridge is only requested in xen_pt but was
implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc
which is hereby resolved.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/i386/pc_piix.c        | 118 --------------------------------------
 hw/xen/xen_pt.c          |   1 -
 hw/xen/xen_pt.h          |   1 +
 hw/xen/xen_pt_graphics.c | 119 +++++++++++++++++++++++++++++++++++++++
 include/hw/i386/pc.h     |   1 -
 5 files changed, 120 insertions(+), 120 deletions(-)

diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index b72c03d0a6..6ad5c02f07 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -801,124 +801,6 @@ static void pc_i440fx_1_4_machine_options(MachineClass *m)
 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
                       pc_i440fx_1_4_machine_options);
 
-typedef struct {
-    uint16_t gpu_device_id;
-    uint16_t pch_device_id;
-    uint8_t pch_revision_id;
-} IGDDeviceIDInfo;
-
-/* In real world different GPU should have different PCH. But actually
- * the different PCH DIDs likely map to different PCH SKUs. We do the
- * same thing for the GPU. For PCH, the different SKUs are going to be
- * all the same silicon design and implementation, just different
- * features turn on and off with fuses. The SW interfaces should be
- * consistent across all SKUs in a given family (eg LPT). But just same
- * features may not be supported.
- *
- * Most of these different PCH features probably don't matter to the
- * Gfx driver, but obviously any difference in display port connections
- * will so it should be fine with any PCH in case of passthrough.
- *
- * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
- * scenarios, 0x9cc3 for BDW(Broadwell).
- */
-static const IGDDeviceIDInfo igd_combo_id_infos[] = {
-    /* HSW Classic */
-    {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
-    {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
-    {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
-    {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
-    {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
-    /* HSW ULT */
-    {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
-    {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
-    {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
-    {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
-    {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
-    {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
-    /* HSW CRW */
-    {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
-    {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
-    /* HSW Server */
-    {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
-    /* HSW SRVR */
-    {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
-    /* BSW */
-    {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
-    {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
-    {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
-    {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
-    {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
-    {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
-    {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
-    {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
-    {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
-    {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
-    {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
-};
-
-static void isa_bridge_class_init(ObjectClass *klass, void *data)
-{
-    DeviceClass *dc = DEVICE_CLASS(klass);
-    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
-
-    dc->desc        = "ISA bridge faked to support IGD PT";
-    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
-    k->vendor_id    = PCI_VENDOR_ID_INTEL;
-    k->class_id     = PCI_CLASS_BRIDGE_ISA;
-};
-
-static const TypeInfo isa_bridge_info = {
-    .name          = "igd-passthrough-isa-bridge",
-    .parent        = TYPE_PCI_DEVICE,
-    .instance_size = sizeof(PCIDevice),
-    .class_init = isa_bridge_class_init,
-    .interfaces = (InterfaceInfo[]) {
-        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
-        { },
-    },
-};
-
-static void pt_graphics_register_types(void)
-{
-    type_register_static(&isa_bridge_info);
-}
-type_init(pt_graphics_register_types)
-
-void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
-{
-    struct PCIDevice *bridge_dev;
-    int i, num;
-    uint16_t pch_dev_id = 0xffff;
-    uint8_t pch_rev_id = 0;
-
-    num = ARRAY_SIZE(igd_combo_id_infos);
-    for (i = 0; i < num; i++) {
-        if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
-            pch_dev_id = igd_combo_id_infos[i].pch_device_id;
-            pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
-        }
-    }
-
-    if (pch_dev_id == 0xffff) {
-        return;
-    }
-
-    /* Currently IGD drivers always need to access PCH by 1f.0. */
-    bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
-                                   "igd-passthrough-isa-bridge");
-
-    /*
-     * Note that vendor id is always PCI_VENDOR_ID_INTEL.
-     */
-    if (!bridge_dev) {
-        fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
-        return;
-    }
-    pci_config_set_device_id(bridge_dev->config, pch_dev_id);
-    pci_config_set_revision(bridge_dev->config, pch_rev_id);
-}
-
 #ifdef CONFIG_ISAPC
 static void isapc_machine_options(MachineClass *m)
 {
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 027190fa44..829ea9985f 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -60,7 +60,6 @@
 #include "hw/qdev-properties.h"
 #include "hw/qdev-properties-system.h"
 #include "hw/xen/xen.h"
-#include "hw/i386/pc.h"
 #include "hw/xen/xen-legacy-backend.h"
 #include "xen_pt.h"
 #include "qemu/range.h"
diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index 6b8e13cdee..806d832c94 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -43,6 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE)
 
 uint32_t igd_read_opregion(XenPCIPassthroughState *s);
 void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
+void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
 
 /* function type for config reg */
 typedef int (*xen_pt_conf_reg_init)
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index a3bc7e3921..f1fbb98912 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -289,3 +289,122 @@ void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val)
                     (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
                     (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT));
 }
+
+typedef struct {
+    uint16_t gpu_device_id;
+    uint16_t pch_device_id;
+    uint8_t pch_revision_id;
+} IGDDeviceIDInfo;
+
+/*
+ * In real world different GPU should have different PCH. But actually
+ * the different PCH DIDs likely map to different PCH SKUs. We do the
+ * same thing for the GPU. For PCH, the different SKUs are going to be
+ * all the same silicon design and implementation, just different
+ * features turn on and off with fuses. The SW interfaces should be
+ * consistent across all SKUs in a given family (eg LPT). But just same
+ * features may not be supported.
+ *
+ * Most of these different PCH features probably don't matter to the
+ * Gfx driver, but obviously any difference in display port connections
+ * will so it should be fine with any PCH in case of passthrough.
+ *
+ * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
+ * scenarios, 0x9cc3 for BDW(Broadwell).
+ */
+static const IGDDeviceIDInfo igd_combo_id_infos[] = {
+    /* HSW Classic */
+    {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
+    {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
+    {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
+    {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
+    {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
+    /* HSW ULT */
+    {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
+    {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
+    {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
+    {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
+    {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
+    {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
+    /* HSW CRW */
+    {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
+    {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
+    /* HSW Server */
+    {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
+    /* HSW SRVR */
+    {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
+    /* BSW */
+    {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
+    {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
+    {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
+    {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
+    {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
+    {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
+    {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
+    {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
+    {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
+    {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
+    {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
+};
+
+static void isa_bridge_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+    dc->desc        = "ISA bridge faked to support IGD PT";
+    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+    k->vendor_id    = PCI_VENDOR_ID_INTEL;
+    k->class_id     = PCI_CLASS_BRIDGE_ISA;
+};
+
+static const TypeInfo isa_bridge_info = {
+    .name          = "igd-passthrough-isa-bridge",
+    .parent        = TYPE_PCI_DEVICE,
+    .instance_size = sizeof(PCIDevice),
+    .class_init = isa_bridge_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+        { },
+    },
+};
+
+static void pt_graphics_register_types(void)
+{
+    type_register_static(&isa_bridge_info);
+}
+type_init(pt_graphics_register_types)
+
+void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
+{
+    struct PCIDevice *bridge_dev;
+    int i, num;
+    uint16_t pch_dev_id = 0xffff;
+    uint8_t pch_rev_id = 0;
+
+    num = ARRAY_SIZE(igd_combo_id_infos);
+    for (i = 0; i < num; i++) {
+        if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
+            pch_dev_id = igd_combo_id_infos[i].pch_device_id;
+            pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
+        }
+    }
+
+    if (pch_dev_id == 0xffff) {
+        return;
+    }
+
+    /* Currently IGD drivers always need to access PCH by 1f.0. */
+    bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
+                                   "igd-passthrough-isa-bridge");
+
+    /*
+     * Note that vendor id is always PCI_VENDOR_ID_INTEL.
+     */
+    if (!bridge_dev) {
+        fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
+        return;
+    }
+    pci_config_set_device_id(bridge_dev->config, pch_dev_id);
+    pci_config_set_revision(bridge_dev->config, pch_rev_id);
+}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 1a27de9c8b..926a507a0c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -312,5 +312,4 @@ extern const size_t pc_compat_1_4_len;
     } \
     type_init(pc_machine_init_##suffix)
 
-extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
 #endif
-- 
2.35.1

Re: [PATCH 1/2] hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN

[Bernhard Beschow]

Am 26. März 2022 16:58:23 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>igd-passthrough-isa-bridge is only requested in xen_pt but was
>implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc
>which is hereby resolved.
>
>Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>---
> hw/i386/pc_piix.c        | 118 --------------------------------------
> hw/xen/xen_pt.c          |   1 -
> hw/xen/xen_pt.h          |   1 +
> hw/xen/xen_pt_graphics.c | 119 +++++++++++++++++++++++++++++++++++++++
> include/hw/i386/pc.h     |   1 -
> 5 files changed, 120 insertions(+), 120 deletions(-)
>
>diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
>index b72c03d0a6..6ad5c02f07 100644
>--- a/hw/i386/pc_piix.c
>+++ b/hw/i386/pc_piix.c
>@@ -801,124 +801,6 @@ static void pc_i440fx_1_4_machine_options(MachineClass *m)
> DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
>                       pc_i440fx_1_4_machine_options);
> 
>-typedef struct {
>-    uint16_t gpu_device_id;
>-    uint16_t pch_device_id;
>-    uint8_t pch_revision_id;
>-} IGDDeviceIDInfo;
>-
>-/* In real world different GPU should have different PCH. But actually
>- * the different PCH DIDs likely map to different PCH SKUs. We do the
>- * same thing for the GPU. For PCH, the different SKUs are going to be
>- * all the same silicon design and implementation, just different
>- * features turn on and off with fuses. The SW interfaces should be
>- * consistent across all SKUs in a given family (eg LPT). But just same
>- * features may not be supported.
>- *
>- * Most of these different PCH features probably don't matter to the
>- * Gfx driver, but obviously any difference in display port connections
>- * will so it should be fine with any PCH in case of passthrough.
>- *
>- * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
>- * scenarios, 0x9cc3 for BDW(Broadwell).
>- */
>-static const IGDDeviceIDInfo igd_combo_id_infos[] = {
>-    /* HSW Classic */
>-    {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
>-    {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
>-    {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
>-    {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
>-    {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
>-    /* HSW ULT */
>-    {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
>-    {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
>-    {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
>-    {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
>-    {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
>-    {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
>-    /* HSW CRW */
>-    {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
>-    {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
>-    /* HSW Server */
>-    {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
>-    /* HSW SRVR */
>-    {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
>-    /* BSW */
>-    {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
>-    {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
>-    {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
>-    {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
>-    {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
>-    {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
>-    {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
>-    {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
>-    {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
>-    {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
>-    {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
>-};
>-
>-static void isa_bridge_class_init(ObjectClass *klass, void *data)
>-{
>-    DeviceClass *dc = DEVICE_CLASS(klass);
>-    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>-
>-    dc->desc        = "ISA bridge faked to support IGD PT";
>-    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
>-    k->vendor_id    = PCI_VENDOR_ID_INTEL;
>-    k->class_id     = PCI_CLASS_BRIDGE_ISA;
>-};
>-
>-static const TypeInfo isa_bridge_info = {
>-    .name          = "igd-passthrough-isa-bridge",
>-    .parent        = TYPE_PCI_DEVICE,
>-    .instance_size = sizeof(PCIDevice),
>-    .class_init = isa_bridge_class_init,
>-    .interfaces = (InterfaceInfo[]) {
>-        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
>-        { },
>-    },
>-};
>-
>-static void pt_graphics_register_types(void)
>-{
>-    type_register_static(&isa_bridge_info);
>-}
>-type_init(pt_graphics_register_types)
>-
>-void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
>-{
>-    struct PCIDevice *bridge_dev;
>-    int i, num;
>-    uint16_t pch_dev_id = 0xffff;
>-    uint8_t pch_rev_id = 0;
>-
>-    num = ARRAY_SIZE(igd_combo_id_infos);
>-    for (i = 0; i < num; i++) {
>-        if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
>-            pch_dev_id = igd_combo_id_infos[i].pch_device_id;
>-            pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
>-        }
>-    }
>-
>-    if (pch_dev_id == 0xffff) {
>-        return;
>-    }
>-
>-    /* Currently IGD drivers always need to access PCH by 1f.0. */
>-    bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
>-                                   "igd-passthrough-isa-bridge");
>-
>-    /*
>-     * Note that vendor id is always PCI_VENDOR_ID_INTEL.
>-     */
>-    if (!bridge_dev) {
>-        fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
>-        return;
>-    }
>-    pci_config_set_device_id(bridge_dev->config, pch_dev_id);
>-    pci_config_set_revision(bridge_dev->config, pch_rev_id);
>-}
>-
> #ifdef CONFIG_ISAPC
> static void isapc_machine_options(MachineClass *m)
> {
>diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
>index 027190fa44..829ea9985f 100644
>--- a/hw/xen/xen_pt.c
>+++ b/hw/xen/xen_pt.c
>@@ -60,7 +60,6 @@
> #include "hw/qdev-properties.h"
> #include "hw/qdev-properties-system.h"
> #include "hw/xen/xen.h"
>-#include "hw/i386/pc.h"
> #include "hw/xen/xen-legacy-backend.h"
> #include "xen_pt.h"
> #include "qemu/range.h"
>diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
>index 6b8e13cdee..806d832c94 100644
>--- a/hw/xen/xen_pt.h
>+++ b/hw/xen/xen_pt.h
>@@ -43,6 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE)
> 
> uint32_t igd_read_opregion(XenPCIPassthroughState *s);
> void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
>+void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
> 
> /* function type for config reg */
> typedef int (*xen_pt_conf_reg_init)
>diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
>index a3bc7e3921..f1fbb98912 100644
>--- a/hw/xen/xen_pt_graphics.c
>+++ b/hw/xen/xen_pt_graphics.c
>@@ -289,3 +289,122 @@ void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val)
>                     (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
>                     (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT));
> }
>+
>+typedef struct {
>+    uint16_t gpu_device_id;
>+    uint16_t pch_device_id;
>+    uint8_t pch_revision_id;
>+} IGDDeviceIDInfo;
>+
>+/*
>+ * In real world different GPU should have different PCH. But actually
>+ * the different PCH DIDs likely map to different PCH SKUs. We do the
>+ * same thing for the GPU. For PCH, the different SKUs are going to be
>+ * all the same silicon design and implementation, just different
>+ * features turn on and off with fuses. The SW interfaces should be
>+ * consistent across all SKUs in a given family (eg LPT). But just same
>+ * features may not be supported.
>+ *
>+ * Most of these different PCH features probably don't matter to the
>+ * Gfx driver, but obviously any difference in display port connections
>+ * will so it should be fine with any PCH in case of passthrough.
>+ *
>+ * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
>+ * scenarios, 0x9cc3 for BDW(Broadwell).
>+ */
>+static const IGDDeviceIDInfo igd_combo_id_infos[] = {
>+    /* HSW Classic */
>+    {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
>+    {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
>+    {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
>+    {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
>+    {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
>+    /* HSW ULT */
>+    {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
>+    {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
>+    {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
>+    {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
>+    {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
>+    {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
>+    /* HSW CRW */
>+    {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
>+    {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
>+    /* HSW Server */
>+    {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
>+    /* HSW SRVR */
>+    {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
>+    /* BSW */
>+    {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
>+    {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
>+    {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
>+    {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
>+    {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
>+    {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
>+    {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
>+    {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
>+    {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
>+    {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
>+    {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
>+};
>+
>+static void isa_bridge_class_init(ObjectClass *klass, void *data)
>+{
>+    DeviceClass *dc = DEVICE_CLASS(klass);
>+    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>+
>+    dc->desc        = "ISA bridge faked to support IGD PT";
>+    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
>+    k->vendor_id    = PCI_VENDOR_ID_INTEL;
>+    k->class_id     = PCI_CLASS_BRIDGE_ISA;
>+};
>+
>+static const TypeInfo isa_bridge_info = {
>+    .name          = "igd-passthrough-isa-bridge",
>+    .parent        = TYPE_PCI_DEVICE,
>+    .instance_size = sizeof(PCIDevice),
>+    .class_init = isa_bridge_class_init,
>+    .interfaces = (InterfaceInfo[]) {
>+        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
>+        { },
>+    },
>+};
>+
>+static void pt_graphics_register_types(void)
>+{
>+    type_register_static(&isa_bridge_info);
>+}
>+type_init(pt_graphics_register_types)
>+
>+void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
>+{
>+    struct PCIDevice *bridge_dev;
>+    int i, num;
>+    uint16_t pch_dev_id = 0xffff;
>+    uint8_t pch_rev_id = 0;
>+
>+    num = ARRAY_SIZE(igd_combo_id_infos);
>+    for (i = 0; i < num; i++) {
>+        if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
>+            pch_dev_id = igd_combo_id_infos[i].pch_device_id;
>+            pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
>+        }
>+    }
>+
>+    if (pch_dev_id == 0xffff) {
>+        return;
>+    }
>+
>+    /* Currently IGD drivers always need to access PCH by 1f.0. */
>+    bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
>+                                   "igd-passthrough-isa-bridge");
>+
>+    /*
>+     * Note that vendor id is always PCI_VENDOR_ID_INTEL.
>+     */
>+    if (!bridge_dev) {
>+        fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
>+        return;
>+    }
>+    pci_config_set_device_id(bridge_dev->config, pch_dev_id);
>+    pci_config_set_revision(bridge_dev->config, pch_rev_id);
>+}
>diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
>index 1a27de9c8b..926a507a0c 100644
>--- a/include/hw/i386/pc.h
>+++ b/include/hw/i386/pc.h
>@@ -312,5 +312,4 @@ extern const size_t pc_compat_1_4_len;
>     } \
>     type_init(pc_machine_init_##suffix)
> 
>-extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
> #endif

Ping

Re: [PATCH 1/2] hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN

[Anthony PERARD via]

On Sat, Mar 26, 2022 at 05:58:23PM +0100, Bernhard Beschow wrote:
> igd-passthrough-isa-bridge is only requested in xen_pt but was
> implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc
> which is hereby resolved.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>

Acked-by: Anthony PERARD <anthony.perard@citrix.com>

Thanks,

-- 
Anthony PERARD

[PATCH 2/2] hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection

[Bernhard Beschow]

Now that igd_passthrough_isa_bridge_create() is implemented within the
xen context it may use Xen* data types directly and become
xen_igd_passthrough_isa_bridge_create(). This resolves an indirection.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/xen/xen_pt.c          | 11 -----------
 hw/xen/xen_pt.h          |  3 ++-
 hw/xen/xen_pt_graphics.c |  5 ++++-
 3 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 829ea9985f..0ec7e52183 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -701,17 +701,6 @@ static const MemoryListener xen_pt_io_listener = {
     .priority = 10,
 };
 
-static void
-xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
-                                      XenHostPCIDevice *dev)
-{
-    uint16_t gpu_dev_id;
-    PCIDevice *d = &s->dev;
-
-    gpu_dev_id = dev->device_id;
-    igd_passthrough_isa_bridge_create(pci_get_bus(d), gpu_dev_id);
-}
-
 /* destroy. */
 static void xen_pt_destroy(PCIDevice *d) {
 
diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index 806d832c94..e7c4316a7d 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -43,7 +43,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE)
 
 uint32_t igd_read_opregion(XenPCIPassthroughState *s);
 void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
-void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
+void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
+                                           XenHostPCIDevice *dev);
 
 /* function type for config reg */
 typedef int (*xen_pt_conf_reg_init)
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index f1fbb98912..f303f67c9c 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -375,10 +375,13 @@ static void pt_graphics_register_types(void)
 }
 type_init(pt_graphics_register_types)
 
-void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
+void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
+                                           XenHostPCIDevice *dev)
 {
+    PCIBus *bus = pci_get_bus(&s->dev);
     struct PCIDevice *bridge_dev;
     int i, num;
+    const uint16_t gpu_dev_id = dev->device_id;
     uint16_t pch_dev_id = 0xffff;
     uint8_t pch_rev_id = 0;
 
-- 
2.35.1

Re: [PATCH 2/2] hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection

[Anthony PERARD via]

On Sat, Mar 26, 2022 at 05:58:24PM +0100, Bernhard Beschow wrote:
> Now that igd_passthrough_isa_bridge_create() is implemented within the
> xen context it may use Xen* data types directly and become
> xen_igd_passthrough_isa_bridge_create(). This resolves an indirection.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>

Acked-by: Anthony PERARD <anthony.perard@citrix.com>

Thanks,

-- 
Anthony PERARD

Re: [PATCH 0/2] Confine igd-passthrough-isa-bridge to XEN

[Bernhard Beschow]

Am 26. März 2022 16:58:22 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>This patch series changes the "igd-passthrough-isa-bridge" device only to be
>provided if CONFIG_XEN_PCI_PASSTHROUGH is true. With it xen_pt gets decoupled
>from i386/pc.
>
>Bernhard Beschow (2):
>  hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN
>  hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection
>
> hw/i386/pc_piix.c        | 118 -------------------------------------
> hw/xen/xen_pt.c          |  12 ----
> hw/xen/xen_pt.h          |   2 +
> hw/xen/xen_pt_graphics.c | 122 +++++++++++++++++++++++++++++++++++++++
> include/hw/i386/pc.h     |   1 -
> 5 files changed, 124 insertions(+), 131 deletions(-)
>

Ping

Thanks to Anthony the series is reviewed. Which tree wants to pick it up?

Best regards,
Bernhard

Re: [PATCH 0/2] Confine igd-passthrough-isa-bridge to XEN

[Paolo Bonzini]

On 5/5/22 18:56, Bernhard Beschow wrote:
> Am 26. März 2022 16:58:22 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
>> This patch series changes the "igd-passthrough-isa-bridge" device only to be
>> provided if CONFIG_XEN_PCI_PASSTHROUGH is true. With it xen_pt gets decoupled
>>from i386/pc.
>>
>> Bernhard Beschow (2):
>>   hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN
>>   hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection
>>
>> hw/i386/pc_piix.c        | 118 -------------------------------------
>> hw/xen/xen_pt.c          |  12 ----
>> hw/xen/xen_pt.h          |   2 +
>> hw/xen/xen_pt_graphics.c | 122 +++++++++++++++++++++++++++++++++++++++
>> include/hw/i386/pc.h     |   1 -
>> 5 files changed, 124 insertions(+), 131 deletions(-)
>>
> 
> Ping
> 
> Thanks to Anthony the series is reviewed. Which tree wants to pick it up?
> 
> Best regards,
> Bernhard
> 

Queued, thanks.

Paolo