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[31.208.27.151]) by smtp.gmail.com with ESMTPSA id j21-20020a2e3c15000000b0024af39be634sm138445lja.28.2022.04.01.01.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 01:12:08 -0700 (PDT) Date: Fri, 1 Apr 2022 10:12:07 +0200 From: Francisco Iglesias To: "Edgar E. Iglesias" Subject: Re: [PATCH v1 2/2] hw/arm/xlnx-zynqmp: Connect 4 TTC timers Message-ID: <20220401081206.GB18849@fralle-msi> References: <20220331222017.2914409-1-edgar.iglesias@gmail.com> <20220331222017.2914409-3-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220331222017.2914409-3-edgar.iglesias@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::136 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=frasse.iglesias@gmail.com; helo=mail-lf1-x136.google.com X-Spam_score_int: -1006 X-Spam_score: -100.7 X-Spam_bar: --------------------------------------------------- X-Spam_report: (-100.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, USER_IN_WELCOMELIST=-0.01, USER_IN_WHITELIST=-100 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, luc@lmichel.fr, asifsiddiqui120@gmail.com, edgar.iglesias@amd.com, sai.pavan.boddu@xilinx.com, alistair@alistair23.me, richard.henderson@linaro.org, qemu-devel@nongnu.org, f4bug@amsat.org, francisco.iglesias@xilinx.com, frederic.konrad@adacore.com, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On [2022 Apr 01] Fri 00:20:17, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Connect the 4 TTC timers on the ZynqMP. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Francisco Iglesias > --- > include/hw/arm/xlnx-zynqmp.h | 4 ++++ > hw/arm/xlnx-zynqmp.c | 22 ++++++++++++++++++++++ > 2 files changed, 26 insertions(+) > > diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h > index 9d9a9d0bf9..85fd9f53da 100644 > --- a/include/hw/arm/xlnx-zynqmp.h > +++ b/include/hw/arm/xlnx-zynqmp.h > @@ -41,6 +41,7 @@ > #include "hw/or-irq.h" > #include "hw/misc/xlnx-zynqmp-apu-ctrl.h" > #include "hw/misc/xlnx-zynqmp-crf.h" > +#include "hw/timer/cadence_ttc.h" > > #define TYPE_XLNX_ZYNQMP "xlnx-zynqmp" > OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP) > @@ -84,6 +85,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP) > #define XLNX_ZYNQMP_MAX_RAM_SIZE (XLNX_ZYNQMP_MAX_LOW_RAM_SIZE + \ > XLNX_ZYNQMP_MAX_HIGH_RAM_SIZE) > > +#define XLNX_ZYNQMP_NUM_TTC 4 > + > /* > * Unimplemented mmio regions needed to boot some images. > */ > @@ -128,6 +131,7 @@ struct XlnxZynqMPState { > qemu_or_irq qspi_irq_orgate; > XlnxZynqMPAPUCtrl apu_ctrl; > XlnxZynqMPCRF crf; > + CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC]; > > char *boot_cpu; > ARMCPU *boot_cpu_ptr; > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > index 5bfe285a19..375309e68e 100644 > --- a/hw/arm/xlnx-zynqmp.c > +++ b/hw/arm/xlnx-zynqmp.c > @@ -68,6 +68,9 @@ > #define APU_ADDR 0xfd5c0000 > #define APU_IRQ 153 > > +#define TTC0_ADDR 0xFF110000 > +#define TTC0_IRQ 36 > + > #define IPI_ADDR 0xFF300000 > #define IPI_IRQ 64 > > @@ -316,6 +319,24 @@ static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s, qemu_irq *gic) > sysbus_connect_irq(sbd, 0, gic[CRF_IRQ]); > } > > +static void xlnx_zynqmp_create_ttc(XlnxZynqMPState *s, qemu_irq *gic) > +{ > + SysBusDevice *sbd; > + int i, irq; > + > + for (i = 0; i < XLNX_ZYNQMP_NUM_TTC; i++) { > + object_initialize_child(OBJECT(s), "ttc[*]", &s->ttc[i], > + TYPE_CADENCE_TTC); > + sbd = SYS_BUS_DEVICE(&s->ttc[i]); > + > + sysbus_realize(sbd, &error_fatal); > + sysbus_mmio_map(sbd, 0, TTC0_ADDR + i * 0x10000); > + for (irq = 0; irq < 3; irq++) { > + sysbus_connect_irq(sbd, irq, gic[TTC0_IRQ + i * 3 + irq]); > + } > + } > +} > + > static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s) > { > static const struct UnimpInfo { > @@ -721,6 +742,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) > xlnx_zynqmp_create_efuse(s, gic_spi); > xlnx_zynqmp_create_apu_ctrl(s, gic_spi); > xlnx_zynqmp_create_crf(s, gic_spi); > + xlnx_zynqmp_create_ttc(s, gic_spi); > xlnx_zynqmp_create_unimp_mmio(s); > > for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { > -- > 2.25.1 >