qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v3 09/60] target/arm: Change CPUArchState.thumb to bool
Date: Sun, 17 Apr 2022 10:43:35 -0700	[thread overview]
Message-ID: <20220417174426.711829-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220417174426.711829-1-richard.henderson@linaro.org>

Bool is a more appropriate type for this value.
Adjust the assignments to use true/false.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h          | 2 +-
 linux-user/arm/cpu_loop.c | 2 +-
 target/arm/cpu.c          | 2 +-
 target/arm/m_helper.c     | 6 +++---
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a61a52e2f6..4eb378ede2 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -259,6 +259,7 @@ typedef struct CPUArchState {
      */
     uint32_t pstate;
     bool aarch64; /* True if CPU is in aarch64 state; inverse of PSTATE.nRW */
+    bool thumb;   /* True if CPU is in thumb mode; cpsr[5] */
 
     /* Cached TBFLAGS state.  See below for which bits are included.  */
     CPUARMTBFlags hflags;
@@ -285,7 +286,6 @@ typedef struct CPUArchState {
     uint32_t ZF; /* Z set if zero.  */
     uint32_t QF; /* 0 or 1 */
     uint32_t GE; /* cpsr[19:16] */
-    uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */
     uint32_t condexec_bits; /* IT bits.  cpsr[15:10,26:25].  */
     uint32_t btype;  /* BTI branch type.  spsr[11:10].  */
     uint64_t daif; /* exception masks, in the bits they are in PSTATE */
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index aae375d617..2979109f92 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -231,7 +231,7 @@ do_kernel_trap(CPUARMState *env)
     /* Jump back to the caller.  */
     addr = env->regs[14];
     if (addr & 1) {
-        env->thumb = 1;
+        env->thumb = true;
         addr &= ~1;
     }
     env->regs[15] = addr;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 30e0d16ad4..561f180067 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -51,7 +51,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
 
     if (is_a64(env)) {
         env->pc = value;
-        env->thumb = 0;
+        env->thumb = false;
     } else {
         env->regs[15] = value & ~1;
         env->thumb = value & 1;
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index b7a0fe0114..a740c3e160 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -564,7 +564,7 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest)
         env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
     }
     switch_v7m_security_state(env, dest & 1);
-    env->thumb = 1;
+    env->thumb = true;
     env->regs[15] = dest & ~1;
     arm_rebuild_hflags(env);
 }
@@ -590,7 +590,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
          * except that the low bit doesn't indicate Thumb/not.
          */
         env->regs[14] = nextinst;
-        env->thumb = 1;
+        env->thumb = true;
         env->regs[15] = dest & ~1;
         return;
     }
@@ -626,7 +626,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
     }
     env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
     switch_v7m_security_state(env, 0);
-    env->thumb = 1;
+    env->thumb = true;
     env->regs[15] = dest;
     arm_rebuild_hflags(env);
 }
-- 
2.25.1



  parent reply	other threads:[~2022-04-17 17:53 UTC|newest]

Thread overview: 121+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-17 17:43 [PATCH v3 00/60] target/arm: Cleanups, new features, new cpus Richard Henderson
2022-04-17 17:43 ` [PATCH v3 01/60] tcg: Add tcg_constant_ptr Richard Henderson
2022-04-19 10:41   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 02/60] target/arm: Update ISAR fields for ARMv8.8 Richard Henderson
2022-04-19 11:10   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 03/60] target/arm: Update SCR_EL3 bits to ARMv8.8 Richard Henderson
2022-04-19 11:13   ` Alex Bennée
2022-04-19 11:14   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 04/60] target/arm: Update SCTLR bits to ARMv9.2 Richard Henderson
2022-04-19 11:16   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 05/60] target/arm: Change DisasContext.aarch64 to bool Richard Henderson
2022-04-19 11:16   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 06/60] target/arm: Change CPUArchState.aarch64 " Richard Henderson
2022-04-19 11:17   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 07/60] target/arm: Extend store_cpu_offset to take field size Richard Henderson
2022-04-21 16:15   ` Peter Maydell
2022-04-22 13:58   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 08/60] target/arm: Change DisasContext.thumb to bool Richard Henderson
2022-04-21 16:15   ` Peter Maydell
2022-04-22 13:59   ` Alex Bennée
2022-04-22 14:04     ` Peter Maydell
2022-04-22 15:24       ` Richard Henderson
2022-04-17 17:43 ` Richard Henderson [this message]
2022-04-21 16:18   ` [PATCH v3 09/60] target/arm: Change CPUArchState.thumb " Peter Maydell
2022-04-17 17:43 ` [PATCH v3 10/60] target/arm: Remove fpexc32_access Richard Henderson
2022-04-21 16:25   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 11/60] target/arm: Split out set_btype_raw Richard Henderson
2022-04-21 16:27   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 12/60] target/arm: Split out gen_rebuild_hflags Richard Henderson
2022-04-21 18:47   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 13/60] target/arm: Use tcg_constant in translate-a64.c Richard Henderson
2022-04-21 18:49   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 14/60] target/arm: Simplify GEN_SHIFT in translate.c Richard Henderson
2022-04-21 18:56   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 15/60] target/arm: Simplify gen_sar Richard Henderson
2022-04-21 18:57   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 16/60] target/arm: Simplify aa32 DISAS_WFI Richard Henderson
2022-04-21 19:00   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 17/60] target/arm: Use tcg_constant in translate.c Richard Henderson
2022-04-21 19:00   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 18/60] target/arm: Use tcg_constant in translate-m-nocp.c Richard Henderson
2022-04-21 19:03   ` Peter Maydell
2022-04-21 21:37     ` Richard Henderson
2022-04-17 17:43 ` [PATCH v3 19/60] target/arm: Use tcg_constant in translate-neon.c Richard Henderson
2022-04-21 19:06   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 20/60] target/arm: Use smin/smax for do_sat_addsub_32 Richard Henderson
2022-04-21 19:07   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 21/60] target/arm: Use tcg_constant in translate-sve.c Richard Henderson
2022-04-21 19:08   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 22/60] target/arm: Use tcg_constant in translate-vfp.c Richard Henderson
2022-04-21 19:10   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 23/60] target/arm: Use tcg_constant_i32 in translate.h Richard Henderson
2022-04-21 19:11   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 24/60] target/arm: Split out cpregs.h Richard Henderson
2022-04-21 19:14   ` Peter Maydell
2022-04-22 15:21   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 25/60] target/arm: Reorg CPAccessResult and access_check_cp_reg Richard Henderson
2022-04-22  9:32   ` Peter Maydell
2022-04-22 15:31   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 26/60] target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h Richard Henderson
2022-04-22  9:37   ` Peter Maydell
2022-04-22 10:39     ` Richard Henderson
2022-04-22 15:36       ` Alex Bennée
2022-05-01  0:10         ` Richard Henderson
2022-04-17 17:43 ` [PATCH v3 27/60] target/arm: Make some more cpreg data static const Richard Henderson
2022-04-22  9:38   ` Peter Maydell
2022-04-22 15:38   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 28/60] target/arm: Reorg ARMCPRegInfo type field bits Richard Henderson
2022-04-22  9:49   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 29/60] target/arm: Change cpreg access permissions to enum Richard Henderson
2022-04-22  9:52   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 30/60] target/arm: Name CPState type Richard Henderson
2022-04-22  9:53   ` Peter Maydell
2022-04-22 15:51   ` Alex Bennée
2022-04-17 17:43 ` [PATCH v3 31/60] target/arm: Name CPSecureState type Richard Henderson
2022-04-22  9:57   ` Peter Maydell
2022-04-17 17:43 ` [PATCH v3 32/60] target/arm: Update sysreg fields when redirecting for E2H Richard Henderson
2022-04-22 10:39   ` Peter Maydell
2022-05-01  1:03     ` Richard Henderson
2022-04-17 17:43 ` [PATCH v3 33/60] target/arm: Store cpregs key in the hash table directly Richard Henderson
2022-04-22 10:46   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 34/60] target/arm: Cleanup add_cpreg_to_hashtable Richard Henderson
2022-04-22 10:48   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 35/60] target/arm: Handle cpreg registration for missing EL Richard Henderson
2022-04-22 10:57   ` Peter Maydell
2022-04-26  9:40     ` Peter Maydell
2022-04-26 15:31     ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 36/60] target/arm: Drop EL3 no EL2 fallbacks Richard Henderson
2022-04-17 17:44 ` [PATCH v3 37/60] target/arm: Merge zcr reginfo Richard Henderson
2022-04-17 17:44 ` [PATCH v3 38/60] target/arm: Add isar predicates for FEAT_Debugv8p2 Richard Henderson
2022-04-17 17:44 ` [PATCH v3 39/60] target/arm: Adjust definition of CONTEXTIDR_EL2 Richard Henderson
2022-04-17 17:44 ` [PATCH v3 40/60] target/arm: Move cortex impdef sysregs to cpu_tcg.c Richard Henderson
2022-04-22 11:01   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 41/60] target/arm: Update qemu-system-arm -cpu max to cortex-a57 Richard Henderson
2022-04-22 11:02   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 42/60] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max Richard Henderson
2022-04-17 17:44 ` [PATCH v3 43/60] target/arm: Split out aa32_max_features Richard Henderson
2022-04-22 11:03   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 44/60] target/arm: Annotate arm_max_initfn with FEAT identifiers Richard Henderson
2022-04-17 17:44 ` [PATCH v3 45/60] target/arm: Use field names for manipulating EL2 and EL3 modes Richard Henderson
2022-04-17 17:44 ` [PATCH v3 46/60] target/arm: Enable FEAT_Debugv8p2 for -cpu max Richard Henderson
2022-04-17 17:44 ` [PATCH v3 47/60] target/arm: Enable FEAT_Debugv8p4 " Richard Henderson
2022-04-17 17:44 ` [PATCH v3 48/60] target/arm: Add isar_feature_{aa64,any}_ras Richard Henderson
2022-04-17 17:44 ` [PATCH v3 49/60] target/arm: Add minimal RAS registers Richard Henderson
2022-04-17 17:44 ` [PATCH v3 50/60] target/arm: Enable SCR and HCR bits for RAS Richard Henderson
2022-04-17 17:44 ` [PATCH v3 51/60] target/arm: Implement virtual SError exceptions Richard Henderson
2022-04-22 11:06   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 52/60] target/arm: Implement ESB instruction Richard Henderson
2022-04-17 17:44 ` [PATCH v3 53/60] target/arm: Enable FEAT_RAS for -cpu max Richard Henderson
2022-04-17 17:44 ` [PATCH v3 54/60] target/arm: Enable FEAT_IESB " Richard Henderson
2022-04-17 17:44 ` [PATCH v3 55/60] target/arm: Enable FEAT_CSV2 " Richard Henderson
2022-04-17 17:44 ` [PATCH v3 56/60] target/arm: Enable FEAT_CSV2_2 " Richard Henderson
2022-04-29  9:52   ` Damien Hedde
2022-04-29 18:06     ` Richard Henderson
2022-04-17 17:44 ` [PATCH v3 57/60] target/arm: Enable FEAT_CSV3 " Richard Henderson
2022-04-17 17:44 ` [PATCH v3 58/60] target/arm: Enable FEAT_DGH " Richard Henderson
2022-04-17 17:44 ` [PATCH v3 59/60] target/arm: Define cortex-a76 Richard Henderson
2022-04-22 11:08   ` Peter Maydell
2022-04-17 17:44 ` [PATCH v3 60/60] target/arm: Define neoverse-n1 Richard Henderson
2022-04-22 11:08   ` Peter Maydell
2022-04-22  9:01 ` [PATCH v3 00/60] target/arm: Cleanups, new features, new cpus Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220417174426.711829-10-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).