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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id n14-20020a50934e000000b0042053e79386sm8188005eda.91.2022.04.19.01.54.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Apr 2022 01:54:33 -0700 (PDT) Date: Tue, 19 Apr 2022 10:54:32 +0200 From: Igor Mammedov To: Gavin Shan Subject: Re: [PATCH v5 4/4] hw/acpi/aml-build: Use existing CPU topology to build PPTT table Message-ID: <20220419105432.11ad0f90@redhat.com> In-Reply-To: References: <20220403145953.10522-1-gshan@redhat.com> <20220403145953.10522-5-gshan@redhat.com> <20220413155232.0a1f4d88@redhat.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, zhenyzha@redhat.com, wangyanan55@huawei.com, qemu-arm@nongnu.org, shan.gavin@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, 14 Apr 2022 08:33:29 +0800 Gavin Shan wrote: > Hi Igor, > > On 4/13/22 9:52 PM, Igor Mammedov wrote: > > On Sun, 3 Apr 2022 22:59:53 +0800 > > Gavin Shan wrote: > > > >> When the PPTT table is built, the CPU topology is re-calculated, but > >> it's unecessary because the CPU topology has been populated in > >> virt_possible_cpu_arch_ids() on arm/virt machine. > >> > >> This reworks build_pptt() to avoid by reusing the existing one in > >> ms->possible_cpus. Currently, the only user of build_pptt() is > >> arm/virt machine. > >> > >> Signed-off-by: Gavin Shan > >> --- > >> hw/acpi/aml-build.c | 100 +++++++++++++++++--------------------------- > >> 1 file changed, 38 insertions(+), 62 deletions(-) > >> > >> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c > >> index 4086879ebf..4b0f9df3e3 100644 > >> --- a/hw/acpi/aml-build.c > >> +++ b/hw/acpi/aml-build.c > >> @@ -2002,86 +2002,62 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms, > >> const char *oem_id, const char *oem_table_id) > >> { > >> MachineClass *mc = MACHINE_GET_CLASS(ms); > >> - GQueue *list = g_queue_new(); > >> - guint pptt_start = table_data->len; > >> - guint parent_offset; > >> - guint length, i; > >> - int uid = 0; > >> - int socket; > >> + CPUArchIdList *cpus = ms->possible_cpus; > >> + int64_t socket_id = -1, cluster_id = -1, core_id = -1; > >> + uint32_t socket_offset, cluster_offset, core_offset; > >> + uint32_t pptt_start = table_data->len; > >> + int n; > >> AcpiTable table = { .sig = "PPTT", .rev = 2, > >> .oem_id = oem_id, .oem_table_id = oem_table_id }; > >> > >> acpi_table_begin(&table, table_data); > >> > >> - for (socket = 0; socket < ms->smp.sockets; socket++) { > >> - g_queue_push_tail(list, > >> - GUINT_TO_POINTER(table_data->len - pptt_start)); > >> - build_processor_hierarchy_node( > >> - table_data, > >> - /* > >> - * Physical package - represents the boundary > >> - * of a physical package > >> - */ > >> - (1 << 0), > >> - 0, socket, NULL, 0); > >> - } > >> + for (n = 0; n < cpus->len; n++) { > > > >> + if (cpus->cpus[n].props.socket_id != socket_id) { > >> + socket_id = cpus->cpus[n].props.socket_id; > > > > this relies on cpus->cpus[n].props.*_id being sorted form top to down levels > > I'd add here and for other container_id an assert() that checks for that > > specific ID goes in only one direction, to be able to detect when rule is broken. > > > > otherwise on may end up with duplicate containers silently. > > > > Exactly. cpus->cpus[n].props.*_id is sorted as you said in virt_possible_cpu_arch_ids(). > The only user of build_pptt() is arm/virt machine. So it's fine. However, I think I > may need add comments for this in v6. > > /* > * This works with the assumption that cpus[n].props.*_id has been > * sorted from top to down levels in mc->possible_cpu_arch_ids(). > * Otherwise, the unexpected and duplicate containers will be created. > */ > > The implementation in v3 looks complicated, but comprehensive. The one > in this revision (v6) looks simple, but the we're losing flexibility :) comment is not enough, as it will break silently that's why I suggested sprinkling asserts() here. [...] > Thanks, > Gavin >