From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Subject: [PULL 3/7] target/rx: Move DISAS_UPDATE check for write to PSW
Date: Thu, 21 Apr 2022 10:31:10 -0700 [thread overview]
Message-ID: <20220421173114.48357-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220421173114.48357-1-richard.henderson@linaro.org>
Have one check in move_to_cr instead of one in each
function that calls move_to_cr.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20220417165130.695085-4-richard.henderson@linaro.org>
---
target/rx/translate.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/target/rx/translate.c b/target/rx/translate.c
index df7a8e5153..bd4d110e8b 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -368,6 +368,10 @@ static void move_to_cr(DisasContext *ctx, TCGv val, int cr)
switch (cr) {
case 0: /* PSW */
gen_helper_set_psw(cpu_env, val);
+ if (is_privileged(ctx, 0)) {
+ /* PSW.{I,U} may be updated here. exit TB. */
+ ctx->base.is_jmp = DISAS_UPDATE;
+ }
break;
/* case 1: to PC not supported */
case 2: /* USP */
@@ -631,10 +635,6 @@ static bool trans_POPC(DisasContext *ctx, arg_POPC *a)
val = tcg_temp_new();
pop(val);
move_to_cr(ctx, val, a->cr);
- if (a->cr == 0 && is_privileged(ctx, 0)) {
- /* PSW.I may be updated here. exit TB. */
- ctx->base.is_jmp = DISAS_UPDATE;
- }
tcg_temp_free(val);
return true;
}
@@ -2205,9 +2205,6 @@ static bool trans_MVTC_i(DisasContext *ctx, arg_MVTC_i *a)
imm = tcg_const_i32(a->imm);
move_to_cr(ctx, imm, a->cr);
- if (a->cr == 0 && is_privileged(ctx, 0)) {
- ctx->base.is_jmp = DISAS_UPDATE;
- }
tcg_temp_free(imm);
return true;
}
@@ -2216,9 +2213,6 @@ static bool trans_MVTC_i(DisasContext *ctx, arg_MVTC_i *a)
static bool trans_MVTC_r(DisasContext *ctx, arg_MVTC_r *a)
{
move_to_cr(ctx, cpu_regs[a->rs], a->cr);
- if (a->cr == 0 && is_privileged(ctx, 0)) {
- ctx->base.is_jmp = DISAS_UPDATE;
- }
return true;
}
--
2.34.1
next prev parent reply other threads:[~2022-04-21 17:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-21 17:31 [PULL 0/7] target/rx patch queue Richard Henderson
2022-04-21 17:31 ` [PULL 1/7] target/rx: Put tb_flags into DisasContext Richard Henderson
2022-04-21 17:31 ` [PULL 2/7] target/rx: Store PSW.U in tb->flags Richard Henderson
2022-04-21 17:31 ` Richard Henderson [this message]
2022-04-21 17:31 ` [PULL 4/7] target/rx: Swap stack pointers on clrpsw/setpsw instruction Richard Henderson
2022-04-21 17:31 ` [PULL 5/7] hw/rx: rx-gdbsim DTB load address aligned of 16byte Richard Henderson
2022-04-21 17:31 ` [PULL 6/7] target/rx: set PSW.I when executing wait instruction Richard Henderson
2022-04-21 17:31 ` [PULL 7/7] target/rx: update PC correctly in " Richard Henderson
2022-04-22 1:47 ` [PULL 0/7] target/rx patch queue Richard Henderson
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