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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 10/61] hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUE
Date: Fri, 22 Apr 2022 11:03:41 +0100	[thread overview]
Message-ID: <20220422100432.2288247-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org>

In the ItsCmdResult enum, we currently distinguish only CMD_STALL
(failure, stall processing of the command queue) and CMD_CONTINUE
(keep processing the queue), and we use the latter both for "there
was a parameter error, go on to the next command" and "the command
succeeded, go on to the next command".  Sometimes we would like to
distinguish those two cases, so add CMD_CONTINUE_OK to the enum to
represent the success situation, and use it in the relevant places.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220408141550.1271295-11-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_its.c | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 880bc6f647c..179a9b032c2 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -78,11 +78,13 @@ typedef struct VTEntry {
  * and continue processing.
  * The process_* functions which handle individual ITS commands all
  * return an ItsCmdResult which tells process_cmdq() whether it should
- * stall or keep going.
+ * stall, keep going because of an error, or keep going because the
+ * command was a success.
  */
 typedef enum ItsCmdResult {
     CMD_STALL = 0,
     CMD_CONTINUE = 1,
+    CMD_CONTINUE_OK = 2,
 } ItsCmdResult;
 
 /* True if the ITS supports the GICv4 virtual LPI feature */
@@ -400,9 +402,9 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s, uint32_t devid,
         ITEntry ite = {};
         /* remove mapping from interrupt translation table */
         ite.valid = false;
-        return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL;
+        return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STALL;
     }
-    return CMD_CONTINUE;
+    return CMD_CONTINUE_OK;
 }
 
 static ItsCmdResult process_its_cmd(GICv3ITSState *s, const uint64_t *cmdpkt,
@@ -495,7 +497,7 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, const uint64_t *cmdpkt,
     ite.icid = icid;
     ite.doorbell = INTID_SPURIOUS;
     ite.vpeid = 0;
-    return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL;
+    return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 static ItsCmdResult process_vmapti(GICv3ITSState *s, const uint64_t *cmdpkt,
@@ -574,7 +576,7 @@ static ItsCmdResult process_vmapti(GICv3ITSState *s, const uint64_t *cmdpkt,
     ite.icid = 0;
     ite.doorbell = doorbell;
     ite.vpeid = vpeid;
-    return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL;
+    return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 /*
@@ -635,7 +637,7 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt)
         return CMD_CONTINUE;
     }
 
-    return update_cte(s, icid, &cte) ? CMD_CONTINUE : CMD_STALL;
+    return update_cte(s, icid, &cte) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 /*
@@ -696,7 +698,7 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, const uint64_t *cmdpkt)
         return CMD_CONTINUE;
     }
 
-    return update_dte(s, devid, &dte) ? CMD_CONTINUE : CMD_STALL;
+    return update_dte(s, devid, &dte) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpkt)
@@ -725,13 +727,13 @@ static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpkt)
 
     if (rd1 == rd2) {
         /* Move to same target must succeed as a no-op */
-        return CMD_CONTINUE;
+        return CMD_CONTINUE_OK;
     }
 
     /* Move all pending LPIs from redistributor 1 to redistributor 2 */
     gicv3_redist_movall_lpis(&s->gicv3->cpu[rd1], &s->gicv3->cpu[rd2]);
 
-    return CMD_CONTINUE;
+    return CMD_CONTINUE_OK;
 }
 
 static ItsCmdResult process_movi(GICv3ITSState *s, const uint64_t *cmdpkt)
@@ -845,7 +847,7 @@ static ItsCmdResult process_movi(GICv3ITSState *s, const uint64_t *cmdpkt)
 
     /* Update the ICID field in the interrupt translation table entry */
     old_ite.icid = new_icid;
-    return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE : CMD_STALL;
+    return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 /*
@@ -924,7 +926,7 @@ static ItsCmdResult process_vmapp(GICv3ITSState *s, const uint64_t *cmdpkt)
         return CMD_CONTINUE;
     }
 
-    return update_vte(s, vpeid, &vte) ? CMD_CONTINUE : CMD_STALL;
+    return update_vte(s, vpeid, &vte) ? CMD_CONTINUE_OK : CMD_STALL;
 }
 
 /*
@@ -963,7 +965,7 @@ static void process_cmdq(GICv3ITSState *s)
     }
 
     while (wr_offset != rd_offset) {
-        ItsCmdResult result = CMD_CONTINUE;
+        ItsCmdResult result = CMD_CONTINUE_OK;
         void *hostmem;
         hwaddr buflen;
         uint64_t cmdpkt[GITS_CMDQ_ENTRY_WORDS];
@@ -1055,7 +1057,8 @@ static void process_cmdq(GICv3ITSState *s)
             trace_gicv3_its_cmd_unknown(cmd);
             break;
         }
-        if (result == CMD_CONTINUE) {
+        if (result != CMD_STALL) {
+            /* CMD_CONTINUE or CMD_CONTINUE_OK */
             rd_offset++;
             rd_offset %= s->cq.num_entries;
             s->creadr = FIELD_DP64(s->creadr, GITS_CREADR, OFFSET, rd_offset);
-- 
2.25.1



  parent reply	other threads:[~2022-04-22 10:33 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-22 10:03 [PULL 00/61] target-arm queue Peter Maydell
2022-04-22 10:03 ` [PULL 01/61] hw/intc/arm_gicv3_its: Add missing blank line Peter Maydell
2022-04-22 10:03 ` [PULL 02/61] hw/intc/arm_gicv3: Sanity-check num-cpu property Peter Maydell
2022-04-22 10:03 ` [PULL 03/61] hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count Peter Maydell
2022-04-22 10:03 ` [PULL 04/61] hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers Peter Maydell
2022-04-22 10:03 ` [PULL 05/61] target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2 Peter Maydell
2022-04-22 10:03 ` [PULL 06/61] hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?" Peter Maydell
2022-04-22 10:03 ` [PULL 07/61] hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4 Peter Maydell
2022-04-22 10:03 ` [PULL 08/61] hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI Peter Maydell
2022-04-22 10:03 ` [PULL 09/61] hw/intc/arm_gicv3_its: Implement VMAPP Peter Maydell
2022-04-22 10:03 ` Peter Maydell [this message]
2022-04-22 10:03 ` [PULL 11/61] hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid" Peter Maydell
2022-04-22 10:03 ` [PULL 12/61] hw/intc/arm_gicv3_its: Factor out CTE lookup sequence Peter Maydell
2022-04-22 10:03 ` [PULL 13/61] hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code Peter Maydell
2022-04-22 10:03 ` [PULL 14/61] hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd() Peter Maydell
2022-04-22 10:03 ` [PULL 15/61] hw/intc/arm_gicv3: Keep pointers to every connected ITS Peter Maydell
2022-04-22 10:03 ` [PULL 16/61] hw/intc/arm_gicv3_its: Implement VMOVP Peter Maydell
2022-04-22 10:03 ` [PULL 17/61] hw/intc/arm_gicv3_its: Implement VSYNC Peter Maydell
2022-04-22 10:03 ` [PULL 18/61] hw/intc/arm_gicv3_its: Implement INV command properly Peter Maydell
2022-04-22 10:03 ` [PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts Peter Maydell
2022-04-22 10:03 ` [PULL 20/61] hw/intc/arm_gicv3_its: Implement VMOVI Peter Maydell
2022-04-22 10:03 ` [PULL 21/61] hw/intc/arm_gicv3_its: Implement VINVALL Peter Maydell
2022-04-22 10:03 ` [PULL 22/61] hw/intc/arm_gicv3: Implement GICv4's new redistributor frame Peter Maydell
2022-04-22 10:03 ` [PULL 23/61] hw/intc/arm_gicv3: Implement new GICv4 redistributor registers Peter Maydell
2022-04-22 10:03 ` [PULL 24/61] hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update() Peter Maydell
2022-04-22 10:03 ` [PULL 25/61] hw/intc/arm_gicv3_cpuif: Support vLPIs Peter Maydell
2022-04-22 10:03 ` [PULL 26/61] hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily Peter Maydell
2022-04-22 10:03 ` [PULL 27/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic Peter Maydell
2022-04-22 10:03 ` [PULL 28/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic Peter Maydell
2022-04-22 10:04 ` [PULL 29/61] hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes Peter Maydell
2022-04-22 10:04 ` [PULL 30/61] hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code Peter Maydell
2022-04-22 10:04 ` [PULL 31/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 32/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending() Peter Maydell
2022-04-22 10:04 ` [PULL 33/61] hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling Peter Maydell
2022-04-22 10:04 ` [PULL 34/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 35/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall() Peter Maydell
2022-04-22 10:04 ` [PULL 36/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 37/61] hw/intc/arm_gicv3: Update ID and feature registers for GICv4 Peter Maydell
2022-04-22 10:04 ` [PULL 38/61] hw/intc/arm_gicv3: Allow 'revision' property to be set to 4 Peter Maydell
2022-04-22 10:04 ` [PULL 39/61] hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic() Peter Maydell
2022-04-22 10:04 ` [PULL 40/61] hw/arm/virt: Abstract out calculation of redistributor region capacity Peter Maydell
2022-04-22 10:04 ` [PULL 41/61] hw/arm/virt: Support TCG GICv4 Peter Maydell
2022-04-22 10:04 ` [PULL 42/61] target/arm: Update ISAR fields for ARMv8.8 Peter Maydell
2022-04-22 10:04 ` [PULL 43/61] target/arm: Update SCR_EL3 bits to ARMv8.8 Peter Maydell
2022-04-22 10:04 ` [PULL 44/61] target/arm: Update SCTLR bits to ARMv9.2 Peter Maydell
2022-04-22 10:04 ` [PULL 45/61] target/arm: Change DisasContext.aarch64 to bool Peter Maydell
2022-04-22 10:04 ` [PULL 46/61] target/arm: Change CPUArchState.aarch64 " Peter Maydell
2022-04-22 10:04 ` [PULL 47/61] target/arm: Extend store_cpu_offset to take field size Peter Maydell
2022-04-22 10:04 ` [PULL 48/61] target/arm: Change DisasContext.thumb to bool Peter Maydell
2022-04-22 10:04 ` [PULL 49/61] target/arm: Change CPUArchState.thumb " Peter Maydell
2022-04-22 10:04 ` [PULL 50/61] target/arm: Remove fpexc32_access Peter Maydell
2022-04-22 10:04 ` [PULL 51/61] target/arm: Split out set_btype_raw Peter Maydell
2022-04-22 10:04 ` [PULL 52/61] target/arm: Split out gen_rebuild_hflags Peter Maydell
2022-04-22 10:04 ` [PULL 53/61] target/arm: Simplify GEN_SHIFT in translate.c Peter Maydell
2022-04-22 10:04 ` [PULL 54/61] target/arm: Simplify gen_sar Peter Maydell
2022-04-22 10:04 ` [PULL 55/61] target/arm: Simplify aa32 DISAS_WFI Peter Maydell
2022-04-22 10:04 ` [PULL 56/61] target/arm: Use tcg_constant in translate-m-nocp.c Peter Maydell
2022-04-22 10:04 ` [PULL 57/61] target/arm: Use tcg_constant in translate-neon.c Peter Maydell
2022-04-22 10:04 ` [PULL 58/61] target/arm: Use smin/smax for do_sat_addsub_32 Peter Maydell
2022-04-22 10:04 ` [PULL 59/61] target/arm: Use tcg_constant in translate-vfp.c Peter Maydell
2022-04-22 10:04 ` [PULL 60/61] target/arm: Use tcg_constant_i32 in translate.h Peter Maydell
2022-04-22 10:04 ` [PULL 61/61] hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate() Peter Maydell
2022-04-22 11:41 ` [PULL 00/61] target-arm queue Richard Henderson
2022-04-22 13:48   ` Peter Maydell

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