From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 38/61] hw/intc/arm_gicv3: Allow 'revision' property to be set to 4
Date: Fri, 22 Apr 2022 11:04:09 +0100 [thread overview]
Message-ID: <20220422100432.2288247-39-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org>
Now that we have implemented all the GICv4 requirements, relax the
error-checking on the GIC object's 'revision' property to allow a TCG
GIC to be a GICv4, whilst still constraining the KVM GIC to GICv3.
Our 'revision' property doesn't consider the possibility of wanting
to specify the minor version of the GIC -- for instance there is a
GICv3.1 which adds support for extended SPI and PPI ranges, among
other things, and also GICv4.1. But since the QOM property is
internal to QEMU, not user-facing, we can cross that bridge when we
come to it. Within the GIC implementation itself code generally
checks against the appropriate ID register feature bits, and the
only use of s->revision is for setting those ID register bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220408141550.1271295-39-peter.maydell@linaro.org
---
hw/intc/arm_gicv3_common.c | 12 +++++++-----
hw/intc/arm_gicv3_kvm.c | 5 +++++
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 181f342f32c..5634c6fc788 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -326,12 +326,14 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp)
GICv3State *s = ARM_GICV3_COMMON(dev);
int i, rdist_capacity, cpuidx;
- /* revision property is actually reserved and currently used only in order
- * to keep the interface compatible with GICv2 code, avoiding extra
- * conditions. However, in future it could be used, for example, if we
- * implement GICv4.
+ /*
+ * This GIC device supports only revisions 3 and 4. The GICv1/v2
+ * is a separate device.
+ * Note that subclasses of this device may impose further restrictions
+ * on the GIC revision: notably, the in-kernel KVM GIC doesn't
+ * support GICv4.
*/
- if (s->revision != 3) {
+ if (s->revision != 3 && s->revision != 4) {
error_setg(errp, "unsupported GIC revision %d", s->revision);
return;
}
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 5ec5ff9ef6e..06f5aceee52 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -781,6 +781,11 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
return;
}
+ if (s->revision != 3) {
+ error_setg(errp, "unsupported GIC revision %d for in-kernel GIC",
+ s->revision);
+ }
+
if (s->security_extn) {
error_setg(errp, "the in-kernel VGICv3 does not implement the "
"security extensions");
--
2.25.1
next prev parent reply other threads:[~2022-04-22 10:54 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 10:03 [PULL 00/61] target-arm queue Peter Maydell
2022-04-22 10:03 ` [PULL 01/61] hw/intc/arm_gicv3_its: Add missing blank line Peter Maydell
2022-04-22 10:03 ` [PULL 02/61] hw/intc/arm_gicv3: Sanity-check num-cpu property Peter Maydell
2022-04-22 10:03 ` [PULL 03/61] hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count Peter Maydell
2022-04-22 10:03 ` [PULL 04/61] hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers Peter Maydell
2022-04-22 10:03 ` [PULL 05/61] target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2 Peter Maydell
2022-04-22 10:03 ` [PULL 06/61] hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?" Peter Maydell
2022-04-22 10:03 ` [PULL 07/61] hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4 Peter Maydell
2022-04-22 10:03 ` [PULL 08/61] hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI Peter Maydell
2022-04-22 10:03 ` [PULL 09/61] hw/intc/arm_gicv3_its: Implement VMAPP Peter Maydell
2022-04-22 10:03 ` [PULL 10/61] hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUE Peter Maydell
2022-04-22 10:03 ` [PULL 11/61] hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid" Peter Maydell
2022-04-22 10:03 ` [PULL 12/61] hw/intc/arm_gicv3_its: Factor out CTE lookup sequence Peter Maydell
2022-04-22 10:03 ` [PULL 13/61] hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code Peter Maydell
2022-04-22 10:03 ` [PULL 14/61] hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd() Peter Maydell
2022-04-22 10:03 ` [PULL 15/61] hw/intc/arm_gicv3: Keep pointers to every connected ITS Peter Maydell
2022-04-22 10:03 ` [PULL 16/61] hw/intc/arm_gicv3_its: Implement VMOVP Peter Maydell
2022-04-22 10:03 ` [PULL 17/61] hw/intc/arm_gicv3_its: Implement VSYNC Peter Maydell
2022-04-22 10:03 ` [PULL 18/61] hw/intc/arm_gicv3_its: Implement INV command properly Peter Maydell
2022-04-22 10:03 ` [PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts Peter Maydell
2022-04-22 10:03 ` [PULL 20/61] hw/intc/arm_gicv3_its: Implement VMOVI Peter Maydell
2022-04-22 10:03 ` [PULL 21/61] hw/intc/arm_gicv3_its: Implement VINVALL Peter Maydell
2022-04-22 10:03 ` [PULL 22/61] hw/intc/arm_gicv3: Implement GICv4's new redistributor frame Peter Maydell
2022-04-22 10:03 ` [PULL 23/61] hw/intc/arm_gicv3: Implement new GICv4 redistributor registers Peter Maydell
2022-04-22 10:03 ` [PULL 24/61] hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update() Peter Maydell
2022-04-22 10:03 ` [PULL 25/61] hw/intc/arm_gicv3_cpuif: Support vLPIs Peter Maydell
2022-04-22 10:03 ` [PULL 26/61] hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily Peter Maydell
2022-04-22 10:03 ` [PULL 27/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic Peter Maydell
2022-04-22 10:03 ` [PULL 28/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic Peter Maydell
2022-04-22 10:04 ` [PULL 29/61] hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes Peter Maydell
2022-04-22 10:04 ` [PULL 30/61] hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code Peter Maydell
2022-04-22 10:04 ` [PULL 31/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 32/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending() Peter Maydell
2022-04-22 10:04 ` [PULL 33/61] hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling Peter Maydell
2022-04-22 10:04 ` [PULL 34/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 35/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall() Peter Maydell
2022-04-22 10:04 ` [PULL 36/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi() Peter Maydell
2022-04-22 10:04 ` [PULL 37/61] hw/intc/arm_gicv3: Update ID and feature registers for GICv4 Peter Maydell
2022-04-22 10:04 ` Peter Maydell [this message]
2022-04-22 10:04 ` [PULL 39/61] hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic() Peter Maydell
2022-04-22 10:04 ` [PULL 40/61] hw/arm/virt: Abstract out calculation of redistributor region capacity Peter Maydell
2022-04-22 10:04 ` [PULL 41/61] hw/arm/virt: Support TCG GICv4 Peter Maydell
2022-04-22 10:04 ` [PULL 42/61] target/arm: Update ISAR fields for ARMv8.8 Peter Maydell
2022-04-22 10:04 ` [PULL 43/61] target/arm: Update SCR_EL3 bits to ARMv8.8 Peter Maydell
2022-04-22 10:04 ` [PULL 44/61] target/arm: Update SCTLR bits to ARMv9.2 Peter Maydell
2022-04-22 10:04 ` [PULL 45/61] target/arm: Change DisasContext.aarch64 to bool Peter Maydell
2022-04-22 10:04 ` [PULL 46/61] target/arm: Change CPUArchState.aarch64 " Peter Maydell
2022-04-22 10:04 ` [PULL 47/61] target/arm: Extend store_cpu_offset to take field size Peter Maydell
2022-04-22 10:04 ` [PULL 48/61] target/arm: Change DisasContext.thumb to bool Peter Maydell
2022-04-22 10:04 ` [PULL 49/61] target/arm: Change CPUArchState.thumb " Peter Maydell
2022-04-22 10:04 ` [PULL 50/61] target/arm: Remove fpexc32_access Peter Maydell
2022-04-22 10:04 ` [PULL 51/61] target/arm: Split out set_btype_raw Peter Maydell
2022-04-22 10:04 ` [PULL 52/61] target/arm: Split out gen_rebuild_hflags Peter Maydell
2022-04-22 10:04 ` [PULL 53/61] target/arm: Simplify GEN_SHIFT in translate.c Peter Maydell
2022-04-22 10:04 ` [PULL 54/61] target/arm: Simplify gen_sar Peter Maydell
2022-04-22 10:04 ` [PULL 55/61] target/arm: Simplify aa32 DISAS_WFI Peter Maydell
2022-04-22 10:04 ` [PULL 56/61] target/arm: Use tcg_constant in translate-m-nocp.c Peter Maydell
2022-04-22 10:04 ` [PULL 57/61] target/arm: Use tcg_constant in translate-neon.c Peter Maydell
2022-04-22 10:04 ` [PULL 58/61] target/arm: Use smin/smax for do_sat_addsub_32 Peter Maydell
2022-04-22 10:04 ` [PULL 59/61] target/arm: Use tcg_constant in translate-vfp.c Peter Maydell
2022-04-22 10:04 ` [PULL 60/61] target/arm: Use tcg_constant_i32 in translate.h Peter Maydell
2022-04-22 10:04 ` [PULL 61/61] hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate() Peter Maydell
2022-04-22 11:41 ` [PULL 00/61] target-arm queue Richard Henderson
2022-04-22 13:48 ` Peter Maydell
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